• 제목/요약/키워드: Information Signal Process

검색결과 1,422건 처리시간 0.023초

계층분석법을 이용한 교차로망의 신호 제어 (A Study on Control of Traffic Network Signal Control using Analytic Hierachy Process)

  • 진현수
    • 한국지능시스템학회:학술대회논문집
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    • 한국퍼지및지능시스템학회 2007년도 춘계학술대회 학술발표 논문집 제17권 제1호
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    • pp.421-428
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    • 2007
  • 본 논문은 퍼지 계층분석법을 이용하여 교통신호의 교차로망에서의 적합성에 대해서 논의한다. 교차로망에서의 교통신호는 현시, 주기등이 단일 교차로망의 교통신호 대안이라고 한다면 교차로 망에서의 교통신호 대안은 앞에 있는 교차로의 통행차량수와 지체차량수등 2개 이상의 교차로망의 상대적인 대안을 제시하여야 하므로 단일교차로의 교통신호 대안과는 다른 모습을 띠고 있다. 교통신호체계는 고정신호체계, 최적신호체계, 퍼지응용신호체계를 구별하여 응용단계가 높은 신호체계가 적합성이 톨음을 퍼지계층분석법을 이용하여 밝히고 이를 이용 새로운 체계의 교통신호 체계도 재시한다.

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Comprehensive Performance Analysis of Interconnect Variation by Double and Triple Patterning Lithography Processes

  • Kim, Youngmin;Lee, Jaemin;Ryu, Myunghwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권6호
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    • pp.824-831
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    • 2014
  • In this study, structural variations and overlay errors caused by multiple patterning lithography techniques to print narrow parallel metal interconnects are investigated. Resistance and capacitance parasitic of the six lines of parallel interconnects printed by double patterning lithography (DPL) and triple patterning lithography (TPL) are extracted from a field solver. Wide parameter variations both in DPL and TPL processes are analyzed to determine the impact on signal propagation. Simulations of 10% parameter variations in metal lines show delay variations up to 20% and 30% in DPL and TPL, respectively. Monte Carlo statistical analysis shows that the TPL process results in 21% larger standard variation in delay than the DPL process. Crosstalk simulations are conducted to analyze the dependency on the conditions of the neighboring wires. As expected, opposite signal transitions in the neighboring wires significantly degrade the speed of signal propagation, and the impact becomes larger in the C-worst metals patterned by the TPL process compared to those patterned by the DPL process. As a result, both DPL and TPL result in large variations in parasitic and delay. Therefore, an accurate understanding of variations in the interconnect parameters by multiple patterning lithography and adding proper margins in the circuit designs is necessary.

웨이블릿 변환 기반 CNN을 활용한 무선 신호 분류 (Classification of Radio Signals Using Wavelet Transform Based CNN)

  • 송민석;임재성;이민우
    • 한국정보통신학회논문지
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    • 제26권8호
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    • pp.1222-1230
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    • 2022
  • 다양한 변조 기법을 사용하여 저피탐 능력을 갖춘 신호원들이 증가하면서, 신호의 변조 방식을 분류하는 연구가 꾸준히 진행되고 있다. 최근 신호 간섭이나 잡음 환경에서 수신 신호 분류의 성능 개선을 위하여 전처리 과정으로 FFT를 이용하는 CNN(Convolutional Neural Network) 딥러닝 기법이 제안되었다. 하지만 윈도우가 고정되는 FFT의 특성상 탐지 신호의 시간에 따른 변화를 정확히 분류해내지 못한다. 따라서 본 논문에서는 시간 영역과 주파수 영역에서 높은 해상도를 가지고 또한 다양한 유형의 신호를 시간 및 주파수 영역에서 동시에 표현할 수 있는 웨이블릿 변환(wavelet transform)을 전처리 과정으로 사용하는 CNN 모델을 제안한다. 시뮬레이션을 통해 제안하는 웨이블릿 변환 방식이 FFT 변환 방식에 비해 정확도와 학습 속도 측면에서 SNR 변화에 무관하게 우수한 성능을 보이고, 특히 낮은 SNR일 때 더욱 큰 차이를 보임을 입증하였다.

A 4x Time-Domain Interpolation 6-bit 3.4 GS/s 12.6 mW Flash ADC in 65 nm CMOS

  • Liu, Jianwei;Chan, Chi-Hang;Sin, Sai-Weng;U, Seng-Pan;Martins, Rui Paulo
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제16권4호
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    • pp.395-404
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    • 2016
  • A 6-bit 3.4 GS/s flash ADC in a 65 nm CMOS process is reported along with the proposed 4x time-domain interpolation technique which allows the reduction of the number of comparators from the conventional $2^N-1$ to $2^{N-2}$ in a N-bit flash ADC. The proposed scheme effectively achieves a 4x interpolation factor with simple SR-latches without extra clocking and calibration hardware overhead in the interpolated stage where only offset between the $2^{N-2}$ comparators needs to be calibrated. The offset in SR-latches is within ${\pm}0.5$ LSB in the reported ADC under a wide range of process, voltage supply, and temperature (PVT). The design considerations of the proposed technique are detailed in this paper. The prototype achieves 3.4 GS/s with 5.4-bit ENOB at Nyquist and consumes 12.6 mW power at 1 V supply, yielding a Walden FoM of 89 fJ/conversion-step.

전력용 AlGaAs/GaAs HBT의 제작과 소신호 등가 회로 추출에 관한 연구 (A study on the fabrication and the extraction of small signal equivalent circuit of power AlGaAs/GaAs HBTs)

  • 이제희;우효승;원태영
    • 전자공학회논문지A
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    • 제33A권6호
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    • pp.164-171
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    • 1996
  • We report the experimental resutls on AlGaAs/GaAs heterojunction bipolar transistors (HBTs) with carbon-doped base structure. To characterize the output power, load-pull mehtod was employed. By characterizing the devices with HP8510C, we extracted the small-signal equivalent circuit. The HBTs were fabricated employing wet mesa etching and lift-off process of ohmic metals. the implementation of polyimide into the fabriction process was accomplished to obtain the lower dielectric constant resultig in significant reduction of interconnect routing capacitance. The fabricated HBTs with an emitter area of 6${\times}14{\mu}m^{2}$ exhibited current gain of 45, BV$_{CEO}$ of 10V, cut-off frequency of 30GHz and power gain of 1 3dBm. To extract the small signal equivalent circuit, the de-embedded method was applied for parasitic parameters and the calculation of circuit equations for intrinsic parameters.

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BSHR/2 네트워크를 위한 APS 프로토콜 분석 (Analysis of the APS protocol for BSHR/2 networks)

  • 김성선;손희영;이상순
    • 한국컴퓨터정보학회논문지
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    • 제6권2호
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    • pp.108-115
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    • 2001
  • SDH(synchronous digital hierarchy)를 기본으로 한 SHR(self-healing ring) 네트워크는 장애가 발생할 경우 프로세스를 재구성할 수 있으며 APS 프로토콜을 사용하고 있다. 본 연구에서는 양방향으로 트래픽을 전송할 수 있고 두 개의 선로를 갖는 BSHR/2(two fiber bidirectional SHR)네트워크에서의 장애 복구 시간을 측정하였다. 이를 위해 APS(automatic protecti switching) 프로토콜을 분석하고 ITU-T G.841이 제시하는 최대 장애 복구 시간인 50㎳내에 장애를 복구하기 위해 필요한 각 노드들의 프로세싱 시간 영역을 제시하였다. 또한 다중 장애에서 SD(signal degrade) 장애가 선행된 후 다시 SF(signal failure) 장애가 발생하는 경우와 SF 장애가 선행된 후 다시 SF 장애가 발생하는 경우에 대해서도 분석하였으며, 어떠한 경우에도 50㎳내의 장애를 복구할 수 있었다.

Simulation and Analysis of ECT Signals Obtained at Tubesheet and Tube Expansion Area

  • Song, Sung-Chul;Lee, Yun-Tai;Jung, Hee-Sung;Shin, Young-Kil
    • 비파괴검사학회지
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    • 제26권3호
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    • pp.174-180
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    • 2006
  • Steam generator (SG) tubes are expanded inside tubesheet holes by using explosive or hydraulic methods to be fixed in a tubesheet. In the tube expansion process, it is important to minimize the crevice gap between expanded tube and tube sheet. In this paper, absolute and differential signals are computed by a numerical method for several different locations of tube expansion inside and outside a tubesheet and signal variations due to tubesheet, tube expansion and operating frequencies are observed. Results show that low frequency is good for detecting tubesheet location in both types of signals and high frequency is suitable for sizing of tube diameter as well as the detection of transition region. Also learned is that the absolute signal is good for measuring tube diameter, while the differential signal is good for locating the top of tubesheet and both ends of the transition region. In the case of mingled anomaly with tube expansion and tubesheet, low frequency inspection is found to be useful to analyze the mixed signal.

웨이브렛 필터를 이용한 복합 중첩 근신호의 최적화 분리 알고리즘 (An Algorithm for the Optimum Separation of Superimposed EMG Signal Using Wavelet Filter)

  • 이영석;김성환
    • 대한의용생체공학회:의공학회지
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    • 제17권3호
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    • pp.319-326
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    • 1996
  • Clinical myography(EMG) is a technique for diagnosing neuromuscular disorders by analyzing the electrical signal that can be records by needle electrode during a muscular contraction. The EMG signal arises from electrical discharges that accompany the generation of force by groups of muscular fiber, and the analysis of EMG signal provides symptoms that can distinguish disorder of mLecle from disor- ders of nerve. One of the methods for analysis of EMG signal is to separate the individual discharge-the motor unit action potentials(MVAPS) - from EMG signal. But we can only observe the EMG signal that is a superimposed version of time delayed MUAPS. To obtain the information about MUAP(, i.e., position, firing number, magnitude etc), first of all, a method that can separate each MUAP from the EMG signal must be developed Although the methods for MUAP separation have been proposed by many researcherl they have required heavy computational burden. In this paper, we proposed a new method that has less computational burden and performs more reliable separation of superimposed EMG signal using wavelet filter which has multiresolution analysis as major property. As a result, we develope the separation algorithm of superimposed EMG signal which has less computational burden than any other researchers and exacutes exact separation process. The performance of this method has been discussed in the automatic resolving procedure which is neccessary to identify every firing of every motor unit from the EMG pattern.

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Evaluation of an Alarm System Using Signal Detection Theory(SDT)

  • Park, Jin-Kyun;Hong, Jin-Hyuk;Chang, Soon-Heung
    • 한국원자력학회:학술대회논문집
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    • 한국원자력학회 1995년도 추계학술발표회논문집(1)
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    • pp.197-202
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    • 1995
  • When the process disturbance of nuclear power plant occurred, the operator should ensure plant safety, economy and identify the causes of disturbance. To accomplish these goals, operator should process a large amounts of information. Among these, alarms would be often in the operator's first indication of a plant state change or disturbance. To support limited information processing capability of operator, considerable works are under way to develop advanced alarm processing systems and to evaluate it. However, conventional evaluation method could provide just evaluation results but the design alternatives to enhance alarm system performance. To overcome problems associated with conventional evaluation methods of alarm system, signal detection theory(SDT) was introduced, and it was possible conclude that SDT could not only evaluate system but also suggest design alternatives for performance enhancement.

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12-Bit 2차 Noise-Shaping D/A 변환기 (A 12-Bit 2nd-order Noise-Shaping D/A Converter)

  • 김대정;김성준;박재진;정덕균;김원찬
    • 전자공학회논문지A
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    • 제30A권12호
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    • pp.98-107
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    • 1993
  • This paper describes a design of a multi-bit oversampling noise-shaping D/A converter which achieves a resolution of 12 bits using oversampling technique. In the architecture the essential block which determines the whole accuracy is the analog internal D/A converter, and the designed charge-integration internal D/A converter adopts a differential structure in order to minimize the reduction of the resolution due to process variation. As the proposed circuit is driven by signal clocks which contains the information of the data variation from the noise-shaping coder, it minimizes the disadvantage of a charge-integration circuit in the time axis. In order to verify the circuit, it was integrated with the active area of 950$\times$650${\mu}m^{2}$ in a double metal 1.5-$\mu$m CMOS process, and testified that it can achieve a S/N ratio of 75 dB and a S/(N+D) ratio of 60 dB for the signal bandwidth of 9.6 kHz by the measurement with a spectrum analyzer.

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