• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.820-822
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• 2005

We have designed a 32-bit microprocessor with fixed point digital signal processing functionality. This processor, combines both general-purpose microprocessor and digital signal processor functionality using the reduced instruction set computer design principles. It has functional units for arithmetic operation, digital signal processing and memory access. They operate in parallel in order to remove stall cycles after DSP or load/store instructions, which usually need one or more issue latency cycles in addition to the first issue cycle. High performance was achieved with these parallel functional units while adopting a sophisticated five-stage pipeline stucture.

• Proceedings of the KSRS Conference
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• 2005.10a
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• pp.530-533
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• 2005

A raw signal simulator for synthetic aperture radar (SAR) is a useful tool for the design and implementation of SAR system. Also, in order to analyze and verify the developed SAR processor, the raw signal simulator is required. Moreover, there is the need for a test system to help designing new SAR sensors and mission of SAR system. The derived parameters of the SAR simulator also help to generate accurate SAR processing algorithms. Although the ultimate purpose of this research is to presents a general purpose SAR simulator, this paper presents a SAR simulator in frequency domain at the first step. The proposed simulator generates the raw signal by changing various simulation parameters such as antenna parameters, modulation parameters, and sampling parameters. It also uses the statistics from an actual SAR image to imitate actual physical scattering. This paper introduces the procedures and parameters of the simulator, and presents the simulation results. Experiments have been conducted by comparing the simulated raw data with original raw SAR image. In addition, the simulated raw data have been verified through commercial SAR processing software.

• Journal of the Institute of Convergence Signal Processing
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• v.6 no.4
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• pp.169-175
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• 2005

In recent, implementation of the embedded system is gradually in the spotlight of world-wide by information technology(IT) engineers. By this time, an implementation of real time system is limited on image acquisition and processing system in practical. In this paper, the USB camera interface system based on the embedded linux OS is implemented using USB 2.0 camera with low cost. This system can obtain image signals into the memory via X-hyper255B processor from USB camera. It is need to initialize USB camera by the Video4Linux for the kernel device driver. From the system image capturing and image processing can be performed. It is confirmed that the image data can be transformed to packet of Network File System(NFS) and connected to the internetwork, then the data can be monitored from the client computer connected to the internetwork.

• Journal of the Institute of Convergence Signal Processing
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• v.11 no.4
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• pp.289-297
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• 2010

In this paper, A method to prevent the external acoustic noise from being misrecognized as the speech recognition object is presented in the speech activity detection process for the speech recognition. Also this paper confirmed besides the acoustic energy to the lip movement image signals. First of all, the successive images are obtained through the image camera for personal computer and the lip movement whether or not is discriminated. The next, the lip movement image signal data is stored in the shared memory and shares with the speech recognition process. In the mean time, the acoustic energy whether or not by the utterance of a speaker is verified by confirming data stored in the shared memory in the speech activity detection process which is the preprocess phase of the speech recognition. Finally, as a experimental result of linking the speech recognition processor and the image processor, it is confirmed to be normal progression to the output of the speech recognition result if face to the image camera and speak. On the other hand, it is confirmed not to the output the result of the speech recognition if does not face to the image camera and speak. Also, the initial feature values under off-line are replaced by them. Similarly, the initial template image captured while off-line is replaced with a template image captured under on-line, so the discrimination of the lip movement image tracking is raised. An image processing test bed was implemented to confirm the lip movement image tracking process visually and to analyze the related parameters on a real-time basis. As a result of linking the speech and image processing system, the interworking rate shows 99.3% in the various illumination environments.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.12C
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• pp.727-737
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• 2011

This paper presents an implementation scheme of real-time lane and vehicle detection system with FPGA and DSP. In this type of implementation, defining the functionality of each device in efficient manner is of crucial importance. The FPGA is in charge of extracting features from input image sequences in reduced form, and the features are provided to the DSP so that tracking lanes and vehicles are performed based on them. In addition, a way of seamless interconnection between those devices is presented. The experimental results show that the system is able to process at least 15 frames per second for video image sequences with size of $640{\times}480$.

• 제어로봇시스템학회:학술대회논문집
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• 2004.08a
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• pp.1565-1567
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• 2004

Various defects are found in FPD (Flat Panel Display) manufacturing process. So detecting these defects early and reprocessing them is an important factor that reduces the cost of production. In this paper, the bare glass inspection system for the FPD which is the early process inspection system in the FPD manufacturing process is designed and implemented using the high performance and accuracy CCD line scan camera. For the preprocessing of the high speed line image data, the Image Processing Part (IPP) is designed and implemented using high performance DSP (Digital signal Processor), FIFO (First in First out), FPGA (Field Programmable Gate Array) and the Data Management and System Control part are implemented using ARM (Advanced RISC Machine) processor to control many IPP and cameras and to provide remote users with processed data. For evaluating implemented system, experiment environment which has an area camera for reviewing and moving shelf is made.

• Proceedings of the IEEK Conference
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• 2001.06e
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• pp.161-164
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• 2001

In this paper, we has been studied self controlled mobile robot system with CCD camera. This system consists of TMS320F240 digital signal processor, step motor, RF module and CCD camera. we used wireless RF module for movable command transmitging between robot and host PC. This robot go straight until 95 percent filled screen from input image. And the robot recognizes obstacle about 95 percent filled something, so it could avoid the obstacle and conclude new path plan.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 1999.10a
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• pp.119-124
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• 1999

This paper presents new approach to technology pattern recognition of camera back cover and test of soldering. In real-time implementing of pattern recognition camera back cover and test of soldering, the MVB-03 vision board has been used. Image can be captured from standard CCD monochrome camera in resolutions up to 640$\times$480 pixels. Various options re available for color cameras, a synchronous camera reset, and linescan cameras. Image processing os performed using Texas Instruments TMS320C31 digital signal processors. Image display is via a standard composite video monitor and supports non-destructive color overlay. System processing is possible using c30 machine code. Application software can be written in Borland C++ or Visual C++

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.871-872
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• 2008

The method and results of the software implementation of a echo processor for medical ultrasound imaging using a GPU (NVIDIA G80) is presented. The echo signal processing functions are modified in a SIMD manner suitable for the GPU's massively parallel processing architecture so that the GPU's 128 ALUs are utilized nearly 100%. The preliminary result for a frame of image composed of 128 scan lines, each having 10240 16-bit samples, shows that the echo processor can be inplemented at a high rate of 30 frames per second when implemented in C, which is close to the optimized assembly codes running on the TI's TMS320C6416 DSP.

• Korean Journal of Remote Sensing
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• v.33 no.2
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• pp.159-169
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• 2017

The Satellite Electro-Optic Payload System needsspecial requirements with the conditions of limited power consumption and the space environment of solar radiation. The acquired image quality should be mainly depend on the GSD (Ground Sampled Distance), SNR (Signal to Noise Ratio), and MTF (Modulation Transfer Function). On the well-manufactured sensor level, the thermal noise is removed on ASP (Analog Signal Processing) using the CDS (Corrective Double Sampling); the noise signal from the image sensor can be reduced from the offset signals based on the pre-pixels and the dark-pixels. The non-uniformity shall be corrected with gain, offset, and correction parameter of the image sensor pixel characteristic on the sensor control system. This paper describes the SNR enhancement method of the satellite EOS payload using the mentioned noise remove processes on the system design and operation, which is verified by tests and simulations.