• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.618-621
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• 2002

This paper proposes a static vu compensator using hybrid cascade 5-level PWM inverter, Circuit DQ transformation is used for modeling and analysis of the system, and it reveals the important characteristics and related equations of the system. Also, a multilevel PWM technique suitable to hybrid structure Is proposed for less harmonics in the input currents of the system. Finally, the validity of tile characteristics analysis is shown through PSIM simulations.

• The Transactions of the Korean Institute of Power Electronics
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• v.16 no.1
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• pp.30-37
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• 2011

This paper presents a circuit configuration of multilevel inverter to synthesize a large number of output voltage levels by connecting a full-bridge inverter to a 5-level inverter in series. We analyze the characteristics by computer-aided simulations and experiments when it has input voltage sources which have the same and the power of three in the amplitude. In addition, it is compared with the conventional transformer based multilevel inverter.

• Journal of Power Electronics
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• v.10 no.2
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• pp.155-164
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• 2010

This paper presents a voltage control algorithm for a hybrid multilevel inverter based on a staged-perception of the inverter voltage vector diagram. The algorithm is applied to control a three-stage eighteen-level hybrid inverter, which has been designed with a maximum number of symmetrical levels. The inverter has a two-level main stage built using a conventional six-switch inverter and medium- and low- voltage three-level stages constructed using cascaded H-bridge cells. The distinctive feature of the proposed algorithm is its ability to avoid the undesirable high switching frequency for high- and medium- voltage stages despite the fact that the inverter's dc sources voltages are selected to maximize the number of levels by state redundancy elimination. The high- and medium- voltage stages switching algorithms have been developed to assure fundamental switching frequency operation of the high voltage stage and not more than few times this frequency for the medium voltage stage. The low voltage stage is controlled using a SVPWM to achieve the reference voltage vector exactly and to set the order of the dominant harmonics. The inverter has been constructed and the control algorithm has been implemented. Test results show that the proposed algorithm achieves the desired features and all of the major hypotheses have been verified.

• Journal of Power Electronics
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• v.19 no.2
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• pp.413-430
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• 2019

This paper presents an optimum hybrid SVPWM technique for three-level voltage source inverters (VSIs). The proposed hybrid SVPWM technique aims to minimize total harmonic distortion (THD). A new parameter is introduced to incorporate the heterogeneous nature of switching sequences of SVPWM technique. The proposed hybrid SVPWM technique is implemented on a low-cost PIC microcontroller (PIC18F452) and verified experimentally with a 2 KVA three-phase three-level insulated gate bipolar transistor-based VSI. Optimum switching sequence results in the three-level inverter configuration are demonstrated. The proposed hybrid SVPWM technique improves the THD performance by 17.3% compared with the best available three-level SVPWM technique.

• Journal of information and communication convergence engineering
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• v.1 no.3
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• pp.163-168
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• 2003

This paper presents a cascade multilevel PWM rectifier without the isolation transformers for energy build-up at each inverter modules. The features and advantages of the proposed PWM rectifier can be summarized as follows; I) It realizes the high power high voltage AC/DC power conversion, 2) It uses no transformer which is bulky and heavy, 3) It has hybrid structure so that switching devices can be effectively utilized, 4) It produces high quality AC current even in high power high voltage applications, 5) The input power factor remains unity by simple modulation index control. The multilevel rectifier is analyzed by using the circuit DQ transformation whereby the characteristics and control equations are obtained. Finally, it will be shown that the system simulation reveals the validity of analyses.

• Journal of Magnetics
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• v.21 no.1
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• pp.83-93
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• 2016

Due to their performances and inherent benefits, especially in medium-voltage and high-power applications, multilevel inverters have received an increasing attention in real world industrial applications. The present paper deals with a review of the main multilevel inverter topologies as well their most common derived and hybrid structures quoted in previous research works. It also encompasses an investigation on voltage harmonic elimination and THD estimation. For that reason, the paper summarizes the most relevant modulation techniques used so far to enhance the output voltage quality. Theoretical formulas evoked in the literature, for calculating the output voltage THD upper and lower bounds are reported and verified by adequate simulations.

• Journal of Power Electronics
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• v.13 no.1
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• pp.59-69
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• 2013

An alternative technique to control multilevel inverters with vector approximations has been presented. The innovative control method utilizes specially designed two-dimensional hysteresis comparators to simplify the implementation and improve the resultant waveform. The multistage inverter designed with maximum number of levels is operated in such a way to approximate the reference voltage vector by exploiting the large number of multilevel inverter vectors. A three-stage inverter with the main high voltage stage made of three phase, six-switch and singly-fed inverter is considered for application to the proposed design. The proposed control concept is to maintain a higher voltage stage state as long as it can lead to a target vector. High and medium voltage stages controllers are based on surface hysteresis comparators to hold the switching state or to perform the necessary change to achieve its reference voltage with minimal switching losses. The low voltage stage controller is designed to approximate the target reference voltage to the nearest inverter vector using the nearest integer rounding and adjustment comparators. Model simulation and prototype test results show that the proposed control technique clearly outperforms the previous control methods.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.3
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• pp.421-426
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• 2002

Hybrid cascade multilevel PWM inverter has advantages of hybrid structure which enhances the better utilization of power semiconductor switches, that is, both hi호 power-low frequency switch, GTO and low power-high frequency switch, IGBT can be used in the same circuit. In this paper, a static var compensator using hybrid cascade 5-level PWM inverter is presented for high voltage/high power applications. The proposed system is modelled by circuit DQ transformation, and thus an equivalent circuit is obtained which reveals the important characteristics of the system and lead to the related equations. Finally, circuit structure and characteristics is presented and the validity of the characteristics analysis is shown through PSIM simulation.

• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.105-107
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• 2018

This paper presents a new hybrid multilevel converter topology, which consists of a combination of the series connected switched capacitor units with boost ability, and an H-bridge with T-type bidirectional switches. The proposed converter boosts the input voltage without any bulky inductors, and has the small number of components, which can make the size and cost of a power converter greatly reduced. The output filter size and harmonics are also reduced by the high quality multilevel output. In addition, there is no need for complicated methods to balance the capacitor voltage. Simulation and experimental results with a nine-level converter system are presented to validate the proposed topology and modulation method.

• Journal of Power Electronics
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• v.19 no.4
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• pp.907-921
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• 2019

This paper presents two advanced hybrid pulse-width modulation (PWM) strategies for multilevel inverters (MLIs) that provide both common-mode voltage (CMV) elimination and current ripple reduction. The first PWM utilizes sequences that apply one switching state at the double ends of a half-carrier cycle. The second PWM combines the advantages of the former and an existing four-state PWM. Analyses of the harmonic characteristics of the two groups of switching sequences based on a general switching voltage model are carried out, and algorithms to optimize the current ripple are proposed. These methods are simple and can be implemented online for general n-level inverters. Using a three-level NPC inverter and a five-level CHB inverter, good performances in terms of the root mean square current ripple are obtained with the proposed PWM schemes as indicated through improved harmonic distortion factors when compared to existing schemes in almost the entire region of the modulation index. This also leads to a significant reduction in the current total harmonic distortion. Simulation and experimental results are provided to verify the effectiveness of the proposed PWM methods.