• Journal of Communications and Networks
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• v.11 no.6
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• pp.615-625
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• 2009

Worldwide inter-operability for microwave access (WiMAX) is a promising technology that provides high data throughput with low delays for various user types and modes of operation. While much research had been conducted on physical and MAC layers, little attention has been paid to a comprehensive and efficient security solution for WiMAX. We propose a hybrid security solution combining identity-based cryptography (IBC) and certificate based approaches. We provide detailed message exchange steps in order to achieve a complete security that addresses the various kind of threats identified in previous research. While attaining this goal, efficient fusion of both techniques resulted in a 53% bandwidth improvement compared to the standard's approach, PKMv2. Also, in this hybrid approach, we have clarified the key revocation procedures and key lifetimes. Consequently, to the best of knowledge our approach is the first work that unites the advantages of both techniques for improved security while maintaining the low overhead forWiMAX.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.5 no.12
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• pp.2294-2314
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• 2011

The key issue in providing fast and reliable access on cloud services is the effective management of resources in a cloud system. However, the high variation in cloud service access rates affects the system performance considerably when there are no default routines to handle this type of occurrence. Adaptive techniques are used in resource management to support robust systems and maintain well-balanced loads within the servers. This paper presents an adaptive resource management for cloud systems which supports the integration of intelligent methods to promote quality of service (QoS) in provisioning of cloud services. A technique of dynamically assigning cloud services to a group of cloud servers is proposed for the adaptive resource management. Initially, cloud services are collected based on the excess cloud services load and then these are deployed to the assigned cloud servers. The assignment function uses the proposed proportional ordering which efficiently assigns cloud services based on its resource consumption. The difference in resource consumption rate in all nodes is analyzed periodically which decides the execution of service assignment. Performance evaluation showed that the proposed dynamic service assignment (DSA) performed best in throughput performance compared to other resource allocation algorithms.

• Proceedings of the Korean Society of Computer Information Conference
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• 2014.01a
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• pp.9-13
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• 2014

The performance of large scale software applications has been automatically increasing for last few decades under the influence of Moore's law - the number of transistors on a microprocessor roughly doubled every eighteen months. However, on-chip transistors limitations and heating issues led to the emergence of multicore processors. The energy efficient ARM based System-on-Chip (SoC) processors are being considered for future high performance computing systems. In this paper, we present a case study of two widely used parallel programming models i.e. MPI and MapReduce on distributed memory cluster of ARM SoC development boards. The case study application, Black-Scholes option pricing equation, was parallelized and evaluated in terms of power consumption and throughput. The results show that the Hadoop implementation has low instantaneous power consumption that of MPI, but MPI outperforms Hadoop implementation by a factor of 1.46 in terms of total power consumption to execution time ratio.

• Journal of the Semiconductor & Display Technology
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• v.9 no.4
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• pp.19-23
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• 2010

Nanoimprint lithography (NIL) is one of the most versatile and promising technology for micro/nano-patterning due to its simplicity, high throughput and low cost. Recently, one of the major trends of NIL is large-area patterning. Especially, the research of the application of NIL to TFT-LCD field has been increasing. Technical difficulties to keep the uniformity of the residual layer, however, become severer as the imprinting area increases. In this paper we performed a numerical study for a large area NIL (the $2^nd$ generation TFT-LCD glass substrate ($370{\times}470$ mm)) by using finite element method. First, a simple model considering the surrounding wall was established in order to simulate effectively and reduce the computing time. Then, the volume of fluid (VOF) and grid deformation method were utilized to calculate the free surfaces of the resist flow based on an Eulerian grid system. From the simulation, the velocity fields and the imprinting pressure during the filling process in the NIL were analyzed, and the effect of the surrounding wall and the uniformity of residual layer were investigated.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.12 no.2
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• pp.53-64
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• 2002

This paper describes a design of cryptographic processor that implements the AES (Advanced Encryption Standard) block cipher algorithm, "Rijndael". An iterative looping architecture using a single round block is adopted to minimize the hardware required. To achieve high throughput rate, a sub-pipeline stage is added by dividing the round function into two blocks, resulting that the second half of current round function and the first half of next round function are being simultaneously operated. The round block is implemented using 32-bit data path, so each sub-pipeline stage is executed for four clock cycles. The S-box, which is the dominant element of the round block in terms of required hardware resources, is designed using arithmetic circuit computing multiplicative inverse in GF($2^8$) rather than look-up table method, so that encryption and decryption can share the S-boxes. The round keys are generated by on-the-fly key scheduler. The crypto-processor designed in Verilog-HDL and synthesized using 0.25-$\mu\textrm{m}$ CMOS cell library consists of about 23,000 gates. Simulation results show that the critical path delay is about 8-ns and it can operate up to 120-MHz clock Sequency at 2.5-V supply. The designed core was verified using Xilinx FPGA board and test system.

• Journal of KIISE:Computing Practices and Letters
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• v.13 no.4
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• pp.231-239
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• 2007

This paper presents the trade-off relationship between area and performance in the hardware design space exploration for the Korean national standard 128-bit block cipher algorithm SEED. In this paper, we compare the following four hardware design types of SEED algorithm : (1) Design 1 that is 16 round fully pipelining approach, (2) Design 2 that is a one round looping approach, (3) Design 3 that is a G function sharing and looping approach, and (4) Design 4 that is one round with internal 3 stage pipelining approach. The Design 1, Design 2, and Design 3 are the existing design approaches while the Design 4 is the newly proposed design in this paper. Our new design employs the pipeline between three G-functions and adders consisting of a F function, which results in the less area requirement than Design 2 and achieves the higher performance than Design 2 and Design 3 due to pipelining and module sharing techniques. We design and implement all the comparing four approaches with real hardware targeting FPGA for the purpose of exact performance and area analysis. The experimental results show that Design 4 has the highest performance except Design 1 which pursues very aggressive parallelism at the expanse of area. Our proposed design (Design 4) shows the best throughput/area ratio among all the alternatives by 2.8 times. Therefore, our new design for SEED is the most efficient design comparing with the existing designs.

• Journal of KIISE:Information Networking
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• v.29 no.4
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• pp.447-458
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• 2002

In this paper, we design and implement Wireless Transaction Protocol(WTP) and evaluate it for wireless transaction processing in mobile computing environments. The design and implementation of WTP are based on the coroutine model that might be suitable for light-weight portable devices. We test the compatibility between our product and the other products such as Nokia, Kannel and WinWAP For the evaluation of WTP, we use an Internet simulator that can arbitrary generate random wireless errors based on the Gilbert model. In our experiment, the performance of WTP is measured and compared to those of Transmission Control Protocol(TCP) and TCP for Transactions. The experiment shows that WTP outperforms the other two protocols for wireless transaction processing in terms of throughput and delay. Especially, WTP shows much higher performance In ease of high error rate and high probability of burst errors. This comes from the fact that WTP uses a small number of packets to process a transaction compared to the other two protocols and introduces a fixed time interval for retransmission instead of the exponential backoff algorithm. The experiment also shows that the WTP performance is optimized when the retransmission counter is set to 5 or 6 in case of high burst error rate.

• Journal of KIISE:Computer Systems and Theory
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• v.34 no.9
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• pp.407-415
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• 2007

In parallel cluster computing systems, the efficiency of communication between computing nodes is one of important factors that decide overall system performance. Accordingly, many researchers have studied on high-performance inter-node communication. The recently launched multi-core processor, however. increases the importance of intra-node communication as well because the more the number of cores in a node, the more the number of parallel processes running in the same node. Though there have been studies on intra-node communications, these have limited considerations on the state-of-the-art systems. In this paper, we propose a Linux kernel module that minimizes the number of data copy by exploiting the memory mapping mechanism for high-performance intra-node communication. The proposed kernel module supports the Linux kernel version 2.6. The performance measurements over a multi-core system present that the proposed kernel module can achieve lower latency up to 62% and higher throughput up to 144% than an existing kernel module approach. In addition, the measurements reveal that the performance of intra-node communication can vary significantly based on whether the cores that run the communication processes are belong to the same processor package (i.e., sharing the L2 cache).

• Korean Journal of Environmental Biology
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• v.30 no.2
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• pp.77-89
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• 2012

With the advent of the genomics era powered by DNA sequencing technologies, life science is being transformed significantly and biological research and development have been accelerated. Environmental biology concerns the relationships among living organisms and their natural environment, which constitute the global biogeochemical cycle. As sustainability of the ecosystems depends on biodiversity, examining the structure and dynamics of the biotic constituents and fully grasping their genetic and metabolic capabilities are pivotal. The high-speed high-throughput next-generation sequencing can be applied to barcoding organisms either thriving or endangered and to decoding the whole genome information. Furthermore, diversity and the full gene complement of a microbial community can be elucidated and monitored through metagenomic approaches. With regard to human welfare, microbiomes of various human habitats such as gut, skin, mouth, stomach, and vagina, have been and are being scrutinized. To keep pace with the rapid increase of the sequencing capacity, various bioinformatic algorithms and software tools that even utilize supercomputers and cloud computing are being developed for processing and storage of massive data sets. Environmental genomics will be the major force in understanding the structure and function of ecosystems in nature as well as preserving, remediating, and bioprospecting them.

• Journal of Internet Computing and Services
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• v.10 no.4
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• pp.199-211
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• 2009

Recent advancements in wireless networks have enabled support for mobile applications to transfer data over heterogeneous wireless paths in parallel using data striping technique [2]. Traditionally, high performance data transfer requires tuning of multiple TCP sockets, at sender's end, based on bandwidth delay product (BDP). Moreover, traditional techniques like Automatic TCP Buffer Tuning (ATBT), which balance memory and fulfill network demand, is designed for wired infrastructure assuming single flow on a single socket. Hence, in this paper we propose a buffer tuning technique at senders end designed to ensure high performance data transfer by striping data at transport layer across heterogeneous wireless paths. Our mechanism has the capability to become a resource management system for transport layer connections running on multi-homed mobile host supporting features for wireless link i.e. mobility, bandwidth fluctuations, link level losses. We show that our proposed mechanism performs better than ATBT, in efficiently utilizing memory and achieving aggregate throughput.