• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.668-672
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• 2003

In order to reach the high electrical quality of organic thin film transistors (OTFTs) such as high mobility and on-off current ratio, it is strongly desirable to study the enhancement of electrical properties in OTFTs. Here, we report the novel method of hydrogen $(H_{2})$ plasma treatment to improve electrical properties in inverted staggered OTFTs based on pentacene as active layer. To certify the effect of this method, we compared the electrical properties of normal device as a reference with those of device using the novel method. In result, the normal device as a reference making no use of this method exhibited a field effect mobility of 0.055 $cm^{2}/Vs$, on/off current ratio of $10^{3}$, threshold voltage of -4.5 V, and subthreshold slope of 7.6 V/dec. While the device using the novel method exhibited a field effect mobility of 0.174 $cm^{2}/Vs$, on/off current ratio of $10^{6}$. threshold voltage of -0.5 V, and subthreshold slope of 1.49 V/dec. According to these results, we have found the electrical performances in inverted staggered pentacene TFT owing to this novel method are remarkably enhanced. So, this method plays a key role in highly improving the electric performance of OTFTs. Moreover, this method is the first time yet reported for any OTFTs

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.11
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• pp.961-968
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• 2003

In order to reach the high electrical quality of organic thin film transistors (OTFTs) such as high mobility and on-off current ratio, it is strongly desirable to study the enhancement of electrical properties in OTFTs. Here, we report the novel method of hydrogen plasma treatment to improve electrical properties in inverted staggered OTFTs based on pentacene as active layer. To certify the effect of this method, we compared the electrical properties of normal device as a reference with those of device using the novel method. In result, the normal device as a reference making no use of this method exhibited a field effect mobility of 0.055 $\textrm{cm}^2$/Vs, on/off current ratio of 10$^3$, threshold voltage of -4.5 V, and subthreshold slope of 7.6 V/dec. While the device using the novel method exhibited a field effect mobility of 0.174 $\textrm{cm}^2$/Vs, on/off current ratio of 10$\^$6/, threshold voltage of -0.5 V, and subthreshold slope of 1.49 V/dec. According to these results, we have found the electrical performances in inverted staggered pentacene TFT owing to this method are remarkably enhanced. So, this method plays a key role in highly improving the electric performance of OTFTs. Moreover, this method is the first time yet reported for any OTFTs.

• Journal of the Semiconductor & Display Technology
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• v.13 no.3
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• pp.35-38
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• 2014

Flat panel displays fabricated on glass substrate use amorphous Si for data processing circuit. Recent progress in display technology requires a new material to replace the amorphous Si, and ZnO is a good candidate. ZnO is a wide bandgap (3.3 eV) semiconductor with high mobility and good optical transparency. ZnO is usually grown by sputtering using ZnO ceramic target. However, ceramic target is more expensive than metal target, and making large area target is very difficult. In this work we studied characteristics of ZnO thin-film transistor grown by rf sputtering using Zn metal target and $CO_2$. ZnO film was grown at $450^{\circ}C$ substrate temperature, with -70 V substrate bias voltage applied. By using these methods, our ZnO TFT showed $5.2cm^2/Vsec$ mobility, $3{\times}10^6$ on-off ratio, and -7 V threshold voltage.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.106-106
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• 2011

Recently, zinc oxide (ZnO) thin films have attracted great attention as a promising candidate for various electronic applications such as transparent electrodes, thin film transistors, and optoelectronic devices. ZnO thin films have a wide band gap energy of 3.37 eV and transparency in visible region. Moreover, ZnO thin films can be deposited in a poly-crystalline form even at room temperature, extending the choice of substrates including even plastics. Therefore, it is possible to realize thin film transistors by using ZnO thin films as the active channel layer. In this work, we investigated influence of oxygen partial pressure on ZnO thin films and fabricated ZnO-based thin film transistors. ZnO thin films were deposited on glass substrates by using a pulsed laser deposition technique in various oxygen partial pressures from 20 to 100 mTorr at room temperature. X-ray diffraction (XRD), transmission line method (TLM), and UV-Vis spectroscopy were employed to study the structural, electrical, and optical properties of the ZnO thin films. As a result, 80 mTorr was optimal condition for active layer of thin film transistors, since the active layer of thin film transistors needs high resistivity to achieve low off-current and high on-off ratio. The fabricated ZnO-based thin film transistors operated in the enhancement mode with high field effect mobility and low threshold voltage.

• International journal of advanced smart convergence
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• v.1 no.1
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• pp.61-64
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• 2012

The ultraviolet and visible light responsive properties of the amorphous indium gallium zinc oxide thin film transistor have been investigated. Amorphous indium gallium zinc oxide (a-IGZO) thin film transistor operate in the enhancement mode with saturation mobility of $6.99cm^2/Vs$, threshold voltage of 13.5 V, subthreshold slope of 1.58 V/dec and an on/off current ratio of $2.45{\times}10^8$. The transistor was subsequently characterized in respect of visible light and UV illuminations in order to investigate its potential for possible use as a detector. The performance of the transistor is indicates a high-photosensitivity in the off-state with a ratio of photocurrent to dark current of $5.74{\times}10^2$. The obtained results reveal that the amorphous indium gallium zinc oxide thin film transistor can be used to fabricate UV photodetector operating in the 366 nm.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.64-66
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• 2009

We obtained high performance of n-type organic thin film transistors (OTFTs) using a solution process. N, N' bis-(octyl-)-dicyanoperylene-3,4:9,10-bis(dicarboximide) (PDI-$8CN_2$) in ambient air. Low work function interlayer on source/drain is needed to enhance the electron injection to low LUMO level of n-type organic semiconductor. By using self-assembled monolayer (SAM) the field-effect mobility of 0.33 $cm^2$/Vs was achieved.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1193-1196
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• 2009

Low resistivity interconnection and high-mobility channel are required to realize ultrahigh-definition LCDs such as 4k ${\times}$ 2k TVs. We evaluated fully Cu-based gate and Source/Drain interconnections, consisting of stacked pure-Cu/Cu-Mn layers for TFT-LCDs, and found the underlying Cu-Mn alloy film has superior adhesion to glass substrates and CVD-SiOx films. It was also confirmed that wet etching of the Cu/Cu-Mn films without residues and low contact resistance with both channel IGZO and pixel ITO films can be obtained. It is thus considered that the stacked Cu/Cu-Mn structure is one of candidates to replacing conventionally pure-Cu/refractory metal.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.19 no.6
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• pp.558-562
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• 2006

We have synthesized a new p-type polymer, poly(9,9'-n-dioctylfluorene-alt-phenoxazine) (PFPO), via the palladium catalyzed coupling reaction. The number average molecular weight ($M_n$) of PFPO was found to be 23,000. PFPO dissolves in common organic solvents such as chloroform and toluene. The UV-visible absorption maximum of the PFPO thin film is clearly blue-shifted with respect to that of F8T2, poly-(9,9'-n-dioctylfluorene-alt-bithiophene). The introduction of the phenoxazine moiety into the polymer system results in better field-effect transistor (FET) performance than that of F8T2. A solution processed PFPO TFT device with a top contact geometry was found to exhibit a hole mobility of $2.7{\times}10^{-4}cm^2/Vs$ and a low threshold voltage of -2 V with high on/off ratio(${\sim}10^4$).

• Proceedings of the Korean Vacuum Society Conference
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• 1999.07a
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• pp.71-71
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• 1999

현재 소자 제작에 응용되는 수소화된 비정질 실리콘은 PECVD 방법으로 제작하는 것이 보편적인 방법이다. 그러나 비정질 실리콘 박막 트랜지스터는 band gap edge 근처에서 국재준위가 많아 mobility가 작으며 상온에서 조차 불안정하여 신뢰성이 높지 않고, 도핑된 비정질 실리콘의 높은 비저항 등의 단점으로 인하여 고속 회로에 응용이 불가능하다. 반면 다결정질 실리콘 박막 트랜지스터는 a-Si:H TFT 에 비해 재현성이 우수하고 high resolution, high resolution, high contrast LCD에 응용할 수 있다. 하지만, 다결정 실리콘의 grain boundary로 인해 단결정에 비해 많은 defect 들이 존재하여 전도성을 감소시킨다. 따라서 Mobility를 증가시키기 위해서 grain size를 증가시키고 grain boundary 내에 존재하는 trap center를 감소시켜야 한다. 따라서 본 실험에서는 PECVD 장비로 초기 기판을 plasma 처리하여 다결정 실리콘 박막을 제작하여, 기판 처리에 대한 다결정 실리콘 박막의 성장의 특성을 조사하였다. 실험 방법으로는 PECVD 시스템을 이용하여 SiH4 gas와 H2 gas를 선택적으로 증착시키는 LBL 방법을 사용하여 $\mu$c-Si:H 박막을 제작하였다. 비정질 층을 gas plasma treatment 하여 다결정질 실리콘의 증착 initial stage 관찰을 주목적으로 관찰하였다. 다결정 실리콘 박막의 구조적 성질을 조사하기 위하여 Raman, AFM, SEM, XRD를 이용하여 grain 크기와 결정화도에 대해 측정하여 결정성장 mechanism을 관측하였다. LBL 방법으로 증착시킨 박막의 Raman 분석을 통해서 박막 증착 초기에 비정질이 증착된 후에 결정질로 상태가 변화됨을 관측할 수 있었고, SEM image를 통해서 증착 회수를 증가시키면서 grain size가 작아졌다 다시 커지는 현상을 볼 수 있었다. 이 비정질 층의 transition layer를 gas plasma 처리를 통해서 다결정 핵 형성에 영향을 관측하여 적정한 gas plasma를 통해서 다결정질 실리콘 박막 증착 공정을 단축시킬 수 있는 가능성을 짐작할 수 있었고, 또한 표면의 roughnes와 morphology를 AFM을 통하여 관측함으로써 다결정 박막의 핵 형성에 알맞은 증착 표면 특성을 분석 할 수 있었다.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.180-180
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• 2010

Thin film transistors (TFTs) based on oxide semiconductors have emerged as a promising technology, particularly for active-matrix TFT-based backplanes. Currently, an amorphous oxide semiconductor, such as InGaZnO, has been adopted as the channel layer due to its higher electron mobility. However, accurate and repeatable control of this complex material in mass production is not easy. Therefore, simpler polycrystalline materials, such as ZnO and $SnO_2$, remain possible candidates as the channel layer. Inparticular, ZnO-based TFTs have attracted considerable attention, because of their superior properties that include wide bandgap (3.37eV), transparency, and high field effect mobility when compared with conventional amorphous silicon and polycrystalline silicon TFTs. There are some technical challenges to overcome to achieve manufacturability of ZnO-based TFTs. One of the problems, the stability of ZnO-based TFTs, is as yet unsolved since ZnO-based TFTs usually contain defects in the ZnO channel layer and deep level defects in the channel/dielectric interface that cause problems in device operation. The quality of the interface between the channel and dielectric plays a crucial role in transistor performance, and several insulators have been reported that reduce the number of defects in the channel and the interfacial charge trap defects. Additionally, ZnO TFTs using a high quality interface fabricated by a two step atomic layer deposition (ALD) process showed improvement in device performance In this study, we report the fabrication of high performance ZnO TFTs with a $Si_3N_4$ gate insulator treated using plasma. The interface treatment using electron cyclotron resonance (ECR) $O_2$ plasma improves the interface quality by lowering the interface trap density. This process can be easily adapted for industrial applications because the device structure and fabrication process in this paper are compatible with those of a-Si TFTs.