• 제목/요약/키워드: Harmonics level

검색결과 203건 처리시간 0.027초

Harmonic Elimination and Optimization of Stepped Voltage of Multilevel Inverter by Bacterial Foraging Algorithm

  • Salehi, Reza;Vahidi, Behrooz;Farokhnia, Naeem;Abedi, Mehrdad
    • Journal of Electrical Engineering and Technology
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    • 제5권4호
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    • pp.545-551
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    • 2010
  • A new family of DC to AC converters, referred to as multilevel inverter, has received much attention from industries and researchers for its high power and voltage applications. One of the conventional techniques for implementing the switching algorithm in these inverters is optimized harmonic stepped waveform (OHSW). However, the major problem in using this technique is eliminating low order harmonics by solving the nonlinear and complex equations. In this paper, a new approach called the "bacterial foraging algorithm" (BFA) is employed. This algorithm eliminates and optimizes the harmonics in a multilevel inverter. This method has higher speed, precision, and convergence power compared with the genetic algorithm (GA), a famous evolutionary algorithm. The proposed technique can be expanded in any number of levels. The purpose of optimization is to remove some low order harmonics, as well as to ensure the fundamental harmonic retained at the desired value. As a case study, a 13-level inverter is chosen. The comparison results by MATLAB software between the two optimization methods (BFA and GA) have shown the effectiveness and superiority of BFA over GA where convergence is desired to achieve global optimum.

Shunt Active Filter for Multi-Level Inverters Using DDSRF with State Delay Controller

  • Rajesh, C.R.;Umayal, S.P.
    • Journal of Power Electronics
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    • 제18권3호
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    • pp.863-870
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    • 2018
  • The traditional power control theories for the harmonic reduction methods in multilevel inverters are found to be unreliable under unbalanced load conditions. The unreliability in harmonic mitigation is caused by voltage fluctuations, non-linear loads, the use of power switches, etc. In general, the harmonics are reduced by filters. However, such devices are an expensive way to provide a smooth and fast response to secure power systems during dynamic conditions. Hence, the Decoupled Double Synchronous Reference Frame (DDSRF) theory combined with a State Delay Controller (SDC) is proposed to achieve a harmonic reduction in power systems. The DDSRF produces a sinusoidal harmonic that is the opposite of the load harmonic. Then, it injects this harmonic into power systems, which reduces the effect of harmonics. The SDC is used to reduce the delay between the compensation time for power injection and the generation of a reference signal. The proposed technique has been simulated using MATLAB and its reliability has been verified experimentally under unbalanced conditions.

Reconfigurable Selective Harmonic Elimination Technique for Wide Range Operations in Asymmetric Cascaded Multilevel Inverter

  • Kavitha, R;Rani, Thottungal
    • Journal of Power Electronics
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    • 제18권4호
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    • pp.1037-1050
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    • 2018
  • This paper presents a novel reconfigurable selective harmonic elimination technique to control harmonics over a wide range of Modulation Indexes (MI) in Multi-Level Inverter (MLI). In the proposed method, the region of the MI is divided into various sectors and expressions are formulated with different switching patterns for each of the sectors. A memetic BBO-MAS (Biogeography Based Optimization - Mesh Adaptive direct Search) optimization algorithm is proposed for solving the Selective Harmonic Elimination - Pulse Width Modulation (SHE-PWM) technique. An experimental prototype is developed using a Field Programmable Gate Array (FPGA) and their FFT spectrums are analyzed over a wide range of MI using a fluke power logger. Simulation and experimental results have validated the performance of the proposed optimization algorithms and the reconfigurable SHE-PWM technique. Further, the sensitivity of the harmonics has been analyzed considering non-integer variations in the magnitude of the input DC sources.

Spectral Subtraction Using Spectral Harmonics for Robust Speech Recognition in Car Environments

  • Beh, Jounghoon;Ko, Hanseok
    • The Journal of the Acoustical Society of Korea
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    • 제22권2E호
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    • pp.62-68
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    • 2003
  • This paper addresses a novel noise-compensation scheme to solve the mismatch problem between training and testing condition for the automatic speech recognition (ASR) system, specifically in car environment. The conventional spectral subtraction schemes rely on the signal-to-noise ratio (SNR) such that attenuation is imposed on that part of the spectrum that appears to have low SNR, and accentuation is made on that part of high SNR. However, these schemes are based on the postulation that the power spectrum of noise is in general at the lower level in magnitude than that of speech. Therefore, while such postulation is adequate for high SNR environment, it is grossly inadequate for low SNR scenarios such as that of car environment. This paper proposes an efficient spectral subtraction scheme focused specifically to low SNR noisy environment by extracting harmonics distinctively in speech spectrum. Representative experiments confirm the superior performance of the proposed method over conventional methods. The experiments are conducted using car noise-corrupted utterances of Aurora2 corpus.

코사인 필터와 사인 필터의 이득차를 이용한 주파수 측정 (An algorithm for Power Frequency Estimation Using the Difference between the Gains of Cosine and Sine Filters)

  • 남순열;강상희;박종근
    • 대한전기학회논문지:전력기술부문A
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    • 제55권6호
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    • pp.249-254
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    • 2006
  • A new algorithm for estimating power frequency is presented. Unlike conventional algorithms, the proposed algorithm is based on the fact that the magnitude gains of cosine and sine filters become different when the power frequency is deviated from the nominal value. This makes the algorithm capable of providing an accurate and fast estimate of the power frequency. To demonstrate the performance of the developed algorithm, various computer simulated data records are processed. The algorithm showed a high level of robustness as well as high measurement accuracy over a wide range of frequency changes. Moreover, the algorithm was highly immune to harmonics and noise.

고압전동기 결함신호의 특징추출에 관한 연구 (Feature Extraction for Fault Signals of High Voltage Motor Stator Windings)

  • 박재준;김희동
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.2
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    • pp.1154-1157
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    • 2004
  • During normal machine operation, partial discharge(PD) measurements were performed with turbine generator analyzer(TGA) in imitation stator winding of high voltage motors. The motor was energized to 4.47kV, 6.67, respectively. Applied voltage to Imitation winding was used two voltage level, 4.47[KV]and 6.67[KV]. Motors having imitation stator winding were installed with 80pF capacitive couplers at the terminal box Case of PD Pattern regarding applied voltage phase angel, the PD patterns were displayed two dimensional and three dimensional. TGA summarizes each plot with two quantities such as the normalized quantity number(NQN) and the peak PD magnitude(Qm). As the result, we could discrimidate using TGA the difference of internal and surface discharge for imitation stator winding. We have used the other technique, in order to feature extraction of faulty signals on stator winding, Daubechies Discrete wavelet transform and Harmonics analysis(FFT) about faulty signals.

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IGBT를 이용한 전동차용 보조전원장치의 소음 저감에 관한 연구 (A Study on Noise Reduction for Auxiliary Power Supply of railway Vehicle Using IGBT)

  • 노애숙;김주범;배기훈;최종묵
    • 한국철도학회:학술대회논문집
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    • 한국철도학회 1998년도 창립기념 춘계학술대회 논문집
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    • pp.280-286
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    • 1998
  • In recent years, the interest in noise increases gradually and the low noise level becomes one of the important performances in electrical equipment for railway vehicle. In the auxiliary power supply, most of the noise is made by the current ripple of alternating current reactor(ACL) which filters the output voltage. And this current ripple results from the voltage harmonics across the ACL. So the noise can be reduced by eliminating the voltage harmonics across the ACL. This paper shows harmonic eliminating technique which is making gating signals of upper and lower inverter have a phase difference in the 12-step inverter type auxiliary power supply. This technique was proved by testing on the developed 180KVA auxiliary power supply using IGBT.

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A Novel Pulse-Width and Amplitude Modulation (PWAM) Control Strategy for Power Converters

  • Ghoreishy, Hoda;Varjani, Ali Yazdian;Farhangi, Shahrokh;Mohamadian, Mustafa
    • Journal of Power Electronics
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    • 제10권4호
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    • pp.374-381
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    • 2010
  • Typical power electronic converters employ only pulse width modulation (PWM) to generate specific switching patterns. In this paper, a novel control strategy combining both pulse-width and amplitude modulation strategies (PWAM) has been proposed for power converters. The Pulse Amplitude Modulation (PAM), used in communication systems, has been applied to power electronic converters. This increases the degrees of freedom in eliminating or mitigating harmonics when compared to the conventional PWM strategies. The role of PAM in the novel PWAM strategy is based on the control of the converter's dc sources values. Software implementation of the conventional PWM and the PWAM control strategies has been applied to a five-level inverter for mitigating selective harmonics. Results show the superiority of the proposed strategy from the THD point of view along with a reduction in the inverter power dissipation.

멀티레벨 전압형 인버터를 사용한 무효전력보상장치

  • 민완기;김병철;전형석;김형곤;신석두;장성남;이광석
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1999년도 학술대회 논문집 전문대학교육위원
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    • pp.21-25
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    • 1999
  • This paper proposes a novel control strategy of SVC(Static var compensator) using cascade multilevel inverter. To control the reactive power instantaneously, the dq-dynamic system model is described and analyzed. A single pulse pattern based on the SHE(Selective Harmonic Elimination) technique is determined from the look-up table to reduce the line current harmonics and a rotating fundamental frequency switching scheme is applied to adjust the DC capacitor voltage at the scheme level. From the simulation, it is verified that this proposed control scheme make the dynamic control response of SVC fast, the current harmonics low, and the DC capacitor voltage balanced.

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