• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.8
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• pp.3076-3082
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• 2010

The techniques and the products which use various video compression codec are come out from army or civil field. In existing high-end PC environment, process of the video compression codec does not become a problem, but in embedded system environments which limited system resources, because the system load due to the high-resolution images compressed by high-density, issues of performance and utilization are highlighted. This paper proposes the DirectShow Filter interfaces which are a hardware method in order to solve the problem existing software algorithms for image compression performance and peripheral interfaces.

• IEMEK Journal of Embedded Systems and Applications
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• v.15 no.5
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• pp.205-214
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• 2020

With the recent development of hardware and software technology, interest in the development of wearable devices is increasing. In particular, wearable devices require algorithms suitable for low-power and low-capacity embedded devices. Among them, there is an increasing demand for a signal compression algorithm that reduces communication overhead, in order to increase the efficiency of storage and transmission of electrocardiogram (ECG) signals requiring long-time measurement. Because normal beats occupy most of the signal with similar shapes, a high rate of signal compression is possible if normal beats are represented by a template. In this paper, we propose an algorithm for determining the normal beat template using the template cluster and Pearson similarity. Also, the template is expressed effectively as a few vertices through linear approximation algorithm. In experiment of Datum 234 of MIT-BIH arrhythmia database (MIT-BIH ADB) provided by Physionet, a compression ratio was 33.44:1, and an average distribution of root mean square error (RMSE) was 1.55%.

• Journal of Computing Science and Engineering
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• v.4 no.3
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• pp.207-224
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• 2010

This paper presents a compression scheme for mesh geometry, which is suitable for mobile graphics. The main focus is to enable real-time decoding of compressed vertex positions while providing reasonable compression ratios. Our scheme is based on local quantization of vertex positions with mesh partitioning. To prevent visual seams along the partitioning boundaries, we constrain the locally quantized cells of all mesh partitions to have the same size and aligned local axes. We propose a mesh partitioning algorithm to minimize the size of locally quantized cells, which relates to the distortion of a restored mesh. Vertex coordinates are stored in main memory and transmitted to graphics hardware for rendering in the quantized form, saving memory space and system bus bandwidth. Decoding operation is combined with model geometry transformation, and the only overhead to restore vertex positions is one matrix multiplication for each mesh partition. In our experiments, a 32-bit floating point vertex coordinate is quantized into an 8-bit integer, which is the smallest data size supported in a mobile graphics library. With this setting, the distortions of the restored meshes are comparable to 11-bit global quantization of vertex coordinates. We also apply the proposed approach to compression of vertex attributes, such as vertex normals and texture coordinates, and show that gains similar to vertex geometry can be obtained through local quantization with mesh partitioning.

• The KIPS Transactions:PartA
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• v.13A no.3 s.100
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• pp.185-190
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• 2006

JPEG 2000 is used as an alternative to solve the blocking artifact problem with the existing still image compression JPEG algorithm. However, it has shortcomings such as longer floating point computation time and more complexity in the procedure of enhancing the image compression rate and decompression rate. To compensate for these we implemented with hardware the JPEG 2000 algorithm's filter part which requires a lot of floating point computation. This DWT Filter[1] chip is designed on the basis of Daubechies 9/7 filter[6] and is composed of 3-stage pipeline system to optimize the performance and chip size. Our implemented Filter was 7 times faster than software based Filter in the floating point computation.

• Journal of the Institute of Convergence Signal Processing
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• v.22 no.3
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• pp.99-103
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• 2021

Recently, convolutional neural networks (CNNs) have been widely utilized due to their outstanding performance in various computer vision fields. However, due to their computational-intensive and high memory requirements, it is difficult to deploy CNNs on hardware platforms that have limited resources, such as mobile devices and IoT devices. To address these limitations, a neural network compression research is underway to reduce the size of neural networks while maintaining their performance. This paper proposes a CNN compression technique that dynamically adjusts the thresholds of pruning, one of the neural network compression techniques. Unlike the conventional pruning that experimentally or heuristically sets the thresholds that determine the weights to be pruned, the proposed technique can dynamically find the optimal thresholds that prevent accuracy degradation and output the light-weight neural network in less time. To validate the performance of the proposed technique, the LeNet was trained using the MNIST dataset and the light-weight LeNet could be automatically obtained 1.3 to 3 times faster without loss of accuracy.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.215-220
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• 2005

Nowadays, various speech processing systems are being introduced in the fields of robotics. However, real-time processing and high performances are required to properly implement speech processing system for the autonomous robots. Achieving these goals requires advanced hardware techniques including intelligent software algorithms. For example, we need nonlinear amplifier boards which are able to adjust the compression radio (CR) via computer programming. And the necessity for noise reduction, double-buffering on EPLD (Erasable programmable logic device), simultaneous multi-channel AD conversion, distant sound localization will be explained in this paper. These ideas can be used to improve distant and omni-directional speech recognition. This speech processing system, based on embedded Linux system, is supposed to be mounted on the new home service robot, which is being developed at KIST (Korea Institute of Science and Technology)

• Proceedings of the IEEK Conference
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• 2003.11a
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• pp.91-94
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• 2003

H.264/AVC is the upcoming video coding standard of ITU-T H.264 and ISO MPEG-4 AVC. The new standard can achieve a significant improvement up to 50％ in compression ratio compared to MPEG-4 advanced simple profile. In this paper, we propose the novel intra prediction scheme to speed up intra prediction process in H.264/AVC decoder and show the hardware architecture for it. The proposed scheme uses the concurrent processing of the 4$\times$4 intra prediction, which is based on that some 4$\times$4 block pairs in a 16$\times$16 luma block can be processed concurrently. The proposed scheme can reduce intra prediction time by 33 ％.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.4
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• pp.227-233
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• 2006

In order to reduce blocking artifacts and improve compression efficiency, H.264/AVC standard employs an adaptive in-loop deblocking filter. This paper proposes a new hardware architecture of the deblocking filter that employs a four-stage pipelined structure with an efficient data distribution. The proposed architecture allows a simultaneous supply of eight data samples to fully utilize the pipelined filter in both horizontal and vertical filterings. This paper also presents a new filtering order and data reuse scheme between consecutive macroblock filterings to reduce the communication for external memory access. The number of required cycles for filtering one macroblock (MB) is 357 cycles when the proposed filter uses dual port SRAMs. This execution speed is only 41.3% of that of the fastest previous work.

• Transactions on Electrical and Electronic Materials
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• v.13 no.6
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• pp.278-282
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• 2012

Photovoltaic systems have emerged to be one of the cleanest energy systems. Therefore, many large scale solar parks and PV farms have been built to prepare for the post fossil fuel ages. However, due to their large scale, to efficiently manage and operate PV systems, they need to be visually monitored within the range of infrared ray through the Internet. To satisfy this need, the efficient implementation of a high performance video compression standard is required. This paper therefore presents an implementation of H.264 motion estimation, which is one of the most data-intensive and complicated functions in H.264. To achieve this, this work implements vector instructions in hardware and incorporates them in a generic RISC processor architecture, thus increasing the processing speed while minimizing hardware and software design efforts. Extensive simulation results show that this proposed implementation can process motion estimations up to 13 times faster.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.10 no.2
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• pp.93-103
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• 1985

The digital signal processing technique by bandwidth compression has been grown up ragidly owing to integrated circuit developments. In this project, we have proposed the Lee Weighted Hadamard (LWH) transform which retains the main properties of Hadamard matirx. The LWH matrix was weighted in the center of the spatial domain. The human visual of the mid spatial are emphasized more than the low and high spatial frequencies. The fast algorithms of the LWH transform has been studied for hardware realization. The result of this project are availabel to airplane photograph, X-Ray, CATV and the artificial satellite of the digital image processing.