• Title/Summary/Keyword: HILS(Hareware In the Loop Simulation)

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A Study on the Development of HILS System for Performance Test of Digital Governor (디지털 조속기의 성능 시험을 위한 HILS 시스템 개발에 관한 연구)

  • 장민규;조성훈;전일영;안병원;박영산;배철오;이성근;김윤식
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2003.05a
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    • pp.317-319
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    • 2003
  • HILS(Hardware In-the Loop Simulation) is commonly used in the development and testing of embedded systems, when those systems cannot be tested easily, thoroughly, and repeated in their operational environments. HILS can be a useful tool to develop products more quickly and cost effectively and also reduces the possibility of serious defects being discovered after production. During the product development period, Design optimization and hardware/software debugging can be performed using HILS skill. This paper describes a HILS model for the STG(Steam-Turbine Generator) Simulator to prove the performance of the developed Digital Governor. It is developed using software technics which can confirm the responses of a real-time system.

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Clutter Modeling for HILS (HILS를 위한 클러터 모델링)

  • 최승호
    • Proceedings of the Korea Society for Simulation Conference
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    • 1999.04a
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    • pp.26-31
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    • 1999
  • As a part of work to simulate electromagnetic environments for Hareware-In-the-Loop Simulation, clutter signals of pulsed dopplar radar(altimeter) and CW radar are modeled as numerical expressions for various parameters. The simulated results show that this method is applicable to simulate complex electromagnetic environments.

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A Study on the Active Transit Signal Priority Control Algorithm based on Bus Demand using UTIS (UTIS를 활용한 수요 기반의 능동형 버스우선신호 제어 알고리즘에 관한 연구)

  • Hong, Gyeong-Sik;Jeong, Jun-Ha;An, Gye-Hyeong;Lee, Yeong-In
    • Journal of Korean Society of Transportation
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    • v.29 no.6
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    • pp.107-116
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    • 2011
  • In this paper, we implement an algorithm of transit signal priority control that not only maximizes service quality and efficiency of bus, but also minimizes the control delay of passenger cars using UTIS currently being deployed and operated in Seoul national capital area. For this purpose, we propose an algorithm that coordinates the strength of TSP by estimating bus demand. Typically, the higher the strength of TSP is on main street, the bigger the control delay is on the cross street. Motivated by this practical difficulty, we proposes an algorithm that coordinates TSP's strength by checking the degree of saturation of cross street. Also, we verify the possibility of field implementation via simulation analysis using CORSIM RTE based HILS (Hardware In the Loop Simulation). The result shows that travel time of bus improves about 10 percent without increasing control delay of passenger cars by TSP. We expect the result of this research to contribute to increasing the overall transit ridership in this country.