• Title/Summary/Keyword: HAL

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미국의 소프트프루핑

  • Jo, Gap-Jun
    • 프린팅코리아
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    • s.32
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    • pp.114-117
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    • 2005
  • 미국의 인쇄관련 종합 잡지 아메리칸프린터스 2004년 5월호에 편집인 할 힌더리터(Hal Hinderliter)는 모니터 기반의 교정수단들에 관한 기고문을 발표한 적이 있다. 이 글을 통해 힌더리터는 모니터 기반 교정수단들은 사용자들이 이-메일 또는 FTP(File Transfer Protocol)를 경유해 보내진 PDF파일의 내용과 편집을 검토할 수 있게 함은 물론, 하드 카피 교정과 필적할 만한 더 복잡한 컬러 관리 시스템으로 변화하고 있다고 밝혔다.

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EFFECTS OF CYP2D6*10 GENOTYPE AND CYP3A4 INHIBITION ON THE DISPOSITION AND NEUROLOGICAL SIDE EFFECTS OF HALOPERIDOL IN HUMAN SUBJECTS

  • Park, Ji-Young;Shon, Ji-Hong;Yoon, Young-Ran;Kim, Kyung-Ah;Kim, Min-Jung;Shim, Ju-Chul;Cha, In-June;Shin, Jae-Gook
    • Proceedings of the Korean Society of Toxicology Conference
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    • 2001.05a
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    • pp.149-149
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    • 2001
  • Cytochrome P450 (CYP) 2D6 and CYP3A4 have been reported to be involved in the major metabolic pathways and formations of neurotoxic metabolites (HPP$\^$+/, RHPP$\^$+/) from haloperidol (HAL). However, no in vivo study has been addressed to the involvement of both CYP isoforms on the formation of toxic HAL metabolites.(omitted)

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Design and Implementation of TinyOS Supporting Sensor Transparency of Sensor Nodes (센서노드의 센서 투명성을 지원하는 TinyOS의 확장)

  • So, Sun-Sup;Eun, Seong-Bae;Kim, Byung-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.9
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    • pp.2127-2133
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    • 2010
  • In this paper, we proposed an architecture for supporting sensor transparency in sensor node operating systems, design the standard APIs (Application Programming Interfaces) and sensor device abstraction to provide the sensor transparency and implemented the sensor transparency in the TinyOS, the most well known sensor node operating system. With the proposed sensor node operating system which can support the sensor transparency, application developers can develop the target applications independent to each sensor device by using the standard APIs provided by the sensor node operating system and the sensor device manufacturers also can develop sensor device drivers by using the standard hardware interfaces and HAL (Hardware Adaptation Layer) interfaces independent to the specific hardware platform of sensor nodes.

Optimal Clock Period Selection Algorithm for Low Power Register Transfer Level Design (저전력 레지스티 전송 단계 설계를 위한 최적 클럭 주기 선택 알고리듬)

  • 최지영;김희석
    • Journal of the Korea Society of Computer and Information
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    • v.8 no.4
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    • pp.111-116
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    • 2003
  • We proposed a optimal clock period selection algorithm for low power Register Transfer Level design. The proposed algorithm use the way of maintaining the throughput by reducing supply voltage after improve the system performance in order to minimize the power consumption. In this paper, it select the low power to use pipeline in the transformation of architecture. Also, the proposed algorithm is important the clock period selection in order to maximize the resource sharing. however, it execute the optimal clock period selection algorithm. The experiment result is to set the same result AR and HAL filter on the high level benchmark and to reduce in the case of two pipe stage 10.5% and three pipe stage as many as 33.4%.

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