• Journal of Power Electronics
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• v.14 no.3
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• pp.507-518
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• 2014

This paper presents a new cascaded asymmetrical single phase multilevel converter with a lower number of power semiconductor switches and isolated DC sources. Therefore, the number of power electronic devices, converter losses, size, and cost are reduced. The proposed multilevel converter topology consists of two H-bridges connected in cascaded configuration. One H-bridge operates at a high frequency (high frequency inverter) and is capable of developing a two level output while the other H-bridge operates at the fundamental frequency (low frequency inverter) and is capable of developing a multilevel output. The addition of each power electronic switch to the low frequency inverter increases the number of levels by four. This paper also introduces a hybrid switching algorithm which uses very simple arithmetic and logical operations. The simplified hybrid switching algorithm is generalized for any number of levels. The proposed simplified switching algorithm is developed using a TMS320F2812 DSP board. The operation and performance of the proposed multilevel converter are verified by simulations using MATLAB/SIMULINK and experimental results.

• Journal of international Conference on Electrical Machines and Systems
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• v.1 no.3
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• pp.366-371
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• 2012

In this paper, we propose an electric circuit using one common-arm of H-Bridge inverters to reduce the number of switching components in the multi-level inverter combined with H-Bridge inverters and transformers. And furthermore, we suggested a new multi-level PWM inverter using PWM level to reduce THD (Total Harmonic Distortion). We use a phase-shift switching method that has the same rate of usage at each transformer. Also, we test the proposed prototype 9-level inverter to clarify the proposed electric circuit and reasonableness of the control signal for the proposed multi-level PWM inverter.

• Journal of Power Electronics
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• v.14 no.5
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• pp.937-945
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• 2014

This paper presents an optimized space vector pulse-width modulation (OSVPWM) technique for a five-level cascaded H-bridge (CHB) inverter. The space vector diagram of the five-level CHB inverter is optimized by resolving it into inner and outer two-level space vector hexagons. Unlike conventional space vector topology, the proposed technique significantly reduces the involved computational time and efforts without compromising the performance of the five-level CHB inverter. A further optimized (FOSVPWM) technique is also presented in this paper, which significantly reduces the complexity and computational efforts. The developed techniques are verified through MATLAB/SIMULINK. Results are compared with sinusoidal pulse-width modulation (SPWM) to prove the validity of the proposed technique. The proposed simulation system is realized by using an XC3S400 field-programmable gate array from Xilinx, Inc. The experiment results are then presented for verification.

• Proceedings of the Korean Society of Marine Engineers Conference
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• 2005.06a
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• pp.1022-1028
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• 2005

This paper is presented the analysis results and simulation results of cascaded H-bridge 7 level inverter with various modulation index. Stepped waveform having number of switching was used to eliminate harmonic components. Switching angles according to modulation index are calculated numerically. Therefore, 3 times of switching with 7 level topology and QWS(Quarter Wave Symmetry) could eliminate 5th and 7th harmonics. The harmonic characteristics are compared to those of space vector modulation method which known as common modulation method in industrial field. Stepped waveform method showed higher ability to reduce, especially lower order of harmonics.

• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.4
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• pp.291-297
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• 2012

Recently, Switching devices become cheaper, depending on the multi-level inverters are considered as the power-conversion systems for high-power and power-quality demanding applications. The multi-level inverters can reduce the THD(Total Harmonic Distortion) as the output which is similar sinusoidal waveform by synthesizing several capacitor DC voltages. However it has some disadvantages such as increased number of components, complex PWM control method. Therefore, this paper is proposed the new multi-level inverter topology using an new H-bridge output stage with a bidirectional auxiliary switch. The proposed topology is the 4-level 3-phase PWM inverter with less switching part than conventional multi-level inverters and reactive power control possible. In order to understand the new multi-level inverter, topology analysis and switching patterns and modes according to the current loop are described in this paper. The proposed multi-level inverter topology is validated through PSIM simulation and the experimental results are provided from a prototype.

• The Transactions of the Korean Institute of Power Electronics
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• v.11 no.3
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• pp.239-246
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• 2006

This paper suggests a new modulation strategy for step pulse type multi-level inverter. The proposed strategy is simple to determine the switching angles without regard to increase of levels. Designed to extract the equivalent RMS value compared to ideal sine wave from inverter, it can be applied effectively to high level step pulse inverter. Also this paper proposed modulation strategy for modified H-bridge 13 level inverter which has different cell source voltages with simulation and experiment. The modulation characteristics from simulation and experiment, agreed very well with tracing sine wave about modified structure of cascaded H-bridge multi-level inverter.

• Proceedings of the KIEE Conference
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• 2004.10a
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• pp.153-156
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• 2004

This paper presents a new circuit topology of the half-bridge resonant inverter. As the proposed half-bridge inverter can be operated in the load freewheeling modes, pulse width modulation (PWM) control method can be used for the output power control. The proposed half-bridge inverter should keep unity output displacement factor under the load-impedance varying conditions, if a new PWM control scheme based on the resonant frequency tracking algorithm is adopted. In this paper, electrical characteristics, and losses analysis of the proposed half-bridge resonant inverter are described. Simulation and experimental results of the prototype experimental setup to verify the validity of the proposed half-bridge resonant inverter are presented and discussed.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.23 no.5
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• pp.101-109
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• 2009

In this paper, a new method, cascade 3 phase IHCML(Isolated H-bridge Cascade Multi-Level) inverter and a control method is proposed by using two 3-phase transformers that have respectively different transformation rates. Vector control technique in which the highest proximity vector has been used is also put into use. With this process, the switching frequency is almost identical with the output fundamental frequency, which makes less switching loss, and the switching frequency of the small volume of the H-bridge that is in charge of small power is highly controlled, which improves the quality of the output voltage.

• The Transactions of the Korean Institute of Power Electronics
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• v.9 no.6
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• pp.620-627
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• 2004

As h-bridge multilevel inverter is connected with series of single phase power cell, so it obtain high voltage using low voltage power semi-conductor and output voltage similar to sine wave. In this topology, the number of power cell increases in proportion to the output voltage level. Therefore, there are drawbacks that are responsibility against operating ability of main controller and signal wire increase. However, we can overcome this problems by the substitution of serial communication for the PWM signal in power cell control. Additionally, it has merits of reliability and maintenance. This paper deals with the synchronization and phase-shift method of power cell PWM using CAN(Controller Area Network) communication interrupt in H-bridge multilevel inverter. The advantages of proposed method are signal-line simplification using serial communication between main controller and cell controller, burden reduction in main controller, modularization of power cell, easy protection of each power cell, expandability improvement and reliability increase of control signal and power cell. This paper establishes propriety and reliability of proposed method through experiment of 13-level H-bridge multilevel inverter.

• Journal of international Conference on Electrical Machines and Systems
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• v.1 no.4
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• pp.448-456
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• 2012

This paper presents a multilevel inverter configuration which is designed by insertion of a bidirectional switch between capacitive voltage sources and a conventional H-bridge module. The modified inverter can produce a better sinusoidal waveform by increasing the number of output voltage levels. By serial connection of two modified H-bridge modules, it is possible to produce 9 output voltage levels including zero. There are 24 basic switching patterns with the 9 output voltage levels. Among the patterns, we select the 2 most efficient switching patterns to get a lower switching loss and minimum dv/dt stress. We then analyze characteristics of Total Harmonic Distortion (THD) of the output voltage with variation of input voltage by computer-aided simulations and experiments.