• 제목/요약/키워드: Generator Faults

검색결과 120건 처리시간 0.03초

패리티 공간기법을 이용한 위치 서보계의 최적 잔차 발생 (Optimal residual generation using parity space approach for a position servo system)

  • 최경영;박태건;이기상
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1997년도 한국자동제어학술회의논문집; 한국전력공사 서울연수원; 17-18 Oct. 1997
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    • pp.1440-1443
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    • 1997
  • The optimal residual generator based on parity relation approach for the fault detection and isolation of a arge diesel engine actuator position servo system is presented. The closed-loop residual generator is designed to have robustness against modeling errors and noise. Main purpose of the fault detection and isolation system in the process is to detect and isolate two important faults, i.e., actuatro fault and fault of speed sensor, that, if not detected and compensated, degrade the overall control system performance. Simulation results are give to show the practical applicability of the fault detecrtion and isloation scherme.

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A STUDY ON SOLUTION AGAINST CORE SATURATION INSTABILITY AT AN HVDC CONVERTER

  • Yang Byeong-Mo;Kim Chan-Ki
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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    • pp.591-599
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    • 2001
  • The paper identifies a severe form of core saturation instability in an DC/AC interaction system. It then seeks solutions to the problem by HVDC control means. This is achieved by a proper design of the Voltage Dependent Current Order Limiter (VDCOL), the Current Regulator and Timing Pulse generator. Supplementary control loops have also been introduced to result in a satisfactory performance as compared to that obtained one with the use of uncharacteristic harmonic filter on the AC side. Robustness of all the options has been demonstrated through recovery performance of the DC link in response to both I-phase and 3-phase 5 cycle faults on both rectifier and inverter commutating buses.

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시뮬레이터 탑재형 디지털 여자시스템 기능검증 시험에 관한 연구 (A Study of Function Verification of Digital Excitation System with Real Time Simulator)

  • 류호선;신만수;이주현;임익헌
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2011년도 제42회 하계학술대회
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    • pp.1191-1192
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    • 2011
  • We released new triple redundant digital excitation system with real time generator-turbine simulator. One of its great merits is the real time generator-turbine simulator when it was compared with the other products. If excitation system is tripped by unexpected faults, Maintenance man can do easily performance test of digital excitation control board, sequence relay and thyristor switching device of phase controlled rectifier without manufacturer's support. For the verification of this system, It was tested with an actual excitation system implemented on 5kVA M-G Set. After finishing the tests, the trial product will be installed and operated at a 500MW thermal power plant.

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인공고장 발생장치(AFG)를 이용한 지락고장 실증시험 (The field-test for single line-to-ground fault by an artificial fault generator)

  • 최선규;김동명;강문호
    • 한국조명전기설비학회:학술대회논문집
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    • 한국조명전기설비학회 2004년도 학술대회 논문집
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    • pp.97-100
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    • 2004
  • This paper introduced an artificial fault generator which was operated in the Go-Chang field-test center and explained the result of single line-to-ground fault by AFG. The AFG can basically experiment line-to-line and line-to-ground faults. This facility directly connected distribution transmission lines, so the test results are very useful for power system analysis and protection. Using the function of the AFG, we briefly said the test methods ud results for the 22.9[kV-v] and $6.6[kV-{\Delta}]$ system.

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자속 추종을 통한 DFIG 시스템의 LVRT 기법 (LVRT Scheme for Doubly Fed Induction Generator Systems Based on Flux Tracking Method)

  • 박선영;전영환;이동명
    • 전기학회논문지
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    • 제62권8호
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    • pp.1059-1065
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    • 2013
  • Doubly Fed Induction Generator(DFIG) systems occupy the largest proportion of worldwide wind energy generation market. DFIG systems are very sensitive to grid disturbances especially to voltage dips due to the structure of the stator connected to grid. In the past, when a grid fault occurs generators are separated from grid(trip method) in order to protect the systems. Nowadays, due to the growing penetration level of wind power, many countries have made some requirements that wind turbines are required to have Low Voltage Ride Through(LVRT) capability during grid faults. In this paper, a flux tracking LVRT control strategy based on system modeling equations is proposed. The validity of the proposed strategy is verified through computer simulations.

Detection and Diagnosis of Sensor Faults for Unknown Sensor Bias in PWR Steam Generator

  • Kim, Bong-Seok;Kang, Sook-In;Lee, Yoon-Joon;Kim, Kyung-Youn;Lee, In-Soo;Kim, Jung-Taek;Lee, Jung-Woon
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2002년도 ICCAS
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    • pp.86.5-86
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    • 2002
  • The measurement sensor may contain unknown bias in addition to the white noise in the measurement sequence. In this paper, fault detection and diagnosis scheme for the measurement sensor is developed based on the adaptive estimator. The proposed scheme consists of a parallel bank of Kalman-type filters each matched to a set of different possible biases, a mode probability evaluator, an estimate combiner at the outputs of the filters, a bias estimator, and a fault detection and diagnosis logic. Monte Carlo simulations for the PWR steam generator in the nuclear power plant are provided to illustrate the effectiveness of the proposed scheme.

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전력계통안정도 계산앨고리즘의 개선에 관한 연구 (A new algorithm for power system stability calculations)

  • 박영문
    • 전기의세계
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    • 제29권3호
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    • pp.193-200
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    • 1980
  • A new algorithm for power system stability calculations is developed which considers the nonlinear state equations of 8 state variables for each generator dynamics, expollential load models in respect to bus voltages for nonlinear loads, network equations expressed in terms of bus-injected current sources, various kinds of generator and transmission line outages, abrupt changes in loads, and operations of various kinds of portective relaying systems such as distance relaying, reclosing load shedding by under-frequency relays. In the algorithm are included efficient and reliable schemes for solving network equations by means of the Newton-Raphson iterative method and the Optimally-Ordered Triangular Factorization Technique, and simple procedures for determining fault-point negative and zero sequence impedances for unbalanced line faults. An application of the Optimally-Ordered Triangular Factorization Techniques results in remarkable savings in computing time and memory requirements.

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파이프라인 구조를 갖는 회로를 위한 내장된 자체 검사 설계에 관한 연구 (A Study on Design of BIST for Circuits with Pipeline Architecture)

  • 양선웅;한재천;진명구;장훈
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1998년도 추계학술대회 논문집 학회본부 B
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    • pp.600-602
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    • 1998
  • In this paper, we implement BIST to efficiently test circuits with pipeline architecture and JTAG to control implemented BIST and support board level test. Since implemented BIST is designed to be initialized using new seed, hard-to-detect faults are easily detected. Besides, to optimize area overhead, it uses JTAG instead of BIST controller and modified pipeline register instead of added test pattern generator and signature generator. And, to optimize pin overhead, it uses pins of JTAG. Function and efficiency of implemented BIST is verified by simulation.

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A New Flux Tracking LVRT Control Scheme for Doubly Fed Induction Generators

  • Park, Sun-Young;Ahn, Hyung-Jin;Lee, Dong-Myung
    • Journal of international Conference on Electrical Machines and Systems
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    • 제2권3호
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    • pp.306-312
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    • 2013
  • Doubly fed induction generator (DFIG) systems widely used globally are highly sensitive to the grid disturbance due to the structure that the stator is connected to the grid. In the past, when a grid fault occurs in order to prevent a system, generators are separated from the grid regardless of the fault duration time. Recently, however, the grid connection standards(Grid Code)says that for the failures removed within a certain time, the generator remains operation without separating from the grid. This paper proposes a new flux tracking LVRT(Low-Voltage Ride Through) control based on system modeling equations. The validity of the proposed strategy has been demonstrated by computer simulations.

A Study on Solution against Core Saturation Instability at HVDC Converter

  • Yang, Byeong-Mo;Kim, Chan-Ki;Koh, Bong-Eun;Moon, Young-Hyun
    • Journal of Power Electronics
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    • 제2권4호
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    • pp.297-304
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    • 2002
  • The paper identifies a severe form of core saturation instability in a DC/AC interaction system. It then seeks solutions to the problem by HVDC control means. This is achieved by a proper design of the Voltage Dependent Current Order Limiter (VDCOL), the Current Regulate. and Timing Pulse generator. Supplementary control loops have also been introduced to result in a satisfactory performance as compared to that obtained one with the use of uncharacteristic harmonic filter on the AC side. All the options have been demonstrated through recovery performance of the DC link in response to both 1-phase and 3-phase 5 cycle faults on both rectifier and inverter commutating buses.