• Journal of the Korean Institute of Telematics and Electronics
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• v.16 no.4
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• pp.36-46
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• 1979

Using N_ Ch silicon gate technology . the capacitors and transistors with various dimenssion were fabricated. Although the applied process was somewhat standard the conditions of ion implantation for the gate were varied by changing the implant energies from 30keV to 60keV for B and from 100 keV to 175keV for P . The doses of the implant also changed from 3 $\times$ 10 /$\textrm{cm}^2$ to 5 $\times$ 10 /$\textrm{cm}^2$ for B and from 4$\times$ 10 /$\textrm{cm}^2$ to 7 $\times$ 10 /$\textrm{cm}^2$ for P . The D. C. parameters such as threshold voltage. substrate doping level, the degree of inversion, capacitance. flat band voltage, depletion layer width, gate oxide thickless, surface states, motile charge density, electron mobility. leakage current were evaluated and also compared with the corresponing theoretical values and / or good numbers for application. The threshold voltages measured using curve tracer and C-V plot gave good agreements with the values calculated from SUPREM II which has been developed by Stanford University process group. The threshold vol tapes with back gate bias were used to calculate the change of the substrate doping level. The measured subthreshold slope enabled the prediction of the degree of inversion The D. C. testing results suggest the realized capacitors and transistors are suited for the memory applications.

• Korean Journal of Materials Research
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• v.18 no.12
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• pp.673-677
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• 2008

Calcia (CaO) stabilized cubic-$HfO_2$ is studied by density functional theory (DFT) with generalized gradient approximation (GGA). When a Ca atom is substituted for a Hf atom, an oxygen vacancy is produced to satisfy the charge neutrality. The lattice parameter of a $2{\times}2{\times}2$ cubic $HfO_2$ supercell then increases by $0.02\;{\AA}$. The oxygen atoms closest to the oxygen vacancy are attracted to the vacancy as the vacancy is positive compared to the oxygen ion. When the oxygen vacancy is located at the site closest to the Ca atom, the total energy of $HfO_2$ reaches its minimum. The energy barriers for the migration of the oxygen vacancy were calculated. The energy barriers between the first and the second nearest sites, the second and the third nearest sites, and the third and fourth nearest sites are 0.2, 0.5, and 0.24 eV, respectively. The oxygen vacancies at the third and fourth nearest sites relative to the Ca atom represent the oxygen vacancies in undoped $HfO_2$. Therefore, the energy barrier for oxygen migration in the $HfO_2$ gate dielectric is 0.24 eV, which can explain the origin of gate dielectric leakage.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.237.1-237.1
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• 2016

Electrical properties of graphene-based field effect transistors (G-FETs) can be degraded in ambient conditions owing to physisorbed oxygen or water molecules on the graphene surface. Passivation technique is one of a fascinating strategy for fabrication of G-FETs, which allows to sustain electrical properties of graphene in the long term without disrupting its inherent properties: transparency, flexibility and thinness. Ironically, despite its importance in producing high performance graphene devices, this method has been much less studied compared to patterning or device fabrication processes. Here we report a novel surface passivation method by using atomically thin self-assembled alkane layers such as C18- NH2, C18-Br and C36 to prevent unintentional doping effects that can suppress the degradation of electrical properties. In each passivated device, we observe a shift in charge neutral point to near zero gate voltage and it maintains the device performance for 1 year. In addition, the fabricated PG-FETs on a plastic substrate with ion-gel gate dielectrics exhibit not only mechanical flexibility but also long-term stability in ambient conditions. Therefore, we believe that these highly transparent and ultra-thin passivation layers can become a promising candidate in a wide range of graphene based electronic applications.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.1
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• pp.141-146
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• 2017

In this letter, we propose the use of tunneling field effect transistors (TFET) as a biosensor that detects bio-molecules on the gate oxide. In TFET sensors, the charges of target molecules accumulated at the surface of the gate oxide bend the energy band of p-i-n structure and thus tunneling current varies with the band bending. Sensing parameters of TFET sensors such as threshold voltage ($V_t$) shift and on-current ($I_D$) change are extracted as a function of the charge variation. As a result, it is found that the performances of TFET sensors can surpass those of conventional FET (cFET) based sensors in terms of sensitivity. Furthermore, it is verified that the simultaneous sensing of two different target molecules in a TFET sensor can be performed by using the ambipolar behavior of TFET sensors. Consequently, it is revealed that two different molecules can be sensed simultaneously in a read-out circuit since the multi-sensing is carried out at equivalent current level by the ambipolar behavior.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.293-294
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• 2008

CaO stabilized cubic-$HfO_2$ is studied by using Density Functional Theory with GGA. When a Ca atom is substituted for a Hf atom, an oxygen vacancy is produced to satisfy the charge neutrality condition. When the oxygen vacancy is located at the first nearest site from the Ca atom, the total energy of $HfO_2$ is the most favorable. We calculate the energy barriers for the oxygen vacancy migration. The energy barriers between the first and the second nearest sites, the second and the third nearest sites, and the third and fourth nearest sites are 0.2, 0.5, 0.24 eV, respectively. The oxygen vacancies at the third and fourth nearest sites from the Ca atom represent the oxygen vacancies in undoped $HfO_2$. Therefore, the energy barrier for oxygen migration in $HfO_2$ gate dielectricis is 0.24eV, which can explain a leakage origin of gate dielectric.

• Journal of the Korean Institute of Telematics and Electronics
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• v.22 no.4
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• pp.76-83
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• 1985

Mo2N/Mo double layer which is to be used for gate of the RMOS (refractory metal oxide semiconductor) and interconnection material has been formed by means of low temperature r.f. reactive sputtering in Ar and N2 mixture. The sheet .esistance of 1 000$\AA$Mo2 N/4000$\AA$Mofilm was about 1.20-1.28 ohms/square, which is about an order of magnitude lower than that of polysilicon film. The workfunction difference naE between MO2N/MO layer and (100) p-Si with 6-9 ohm'cm resistivity obtained from C-V plots was about -0.30ev, and the fixed charge density Qss/q in the oxide was about 2. Ix1011/cm2. To evaluate the signal transfer delay time per inverter stage, an integrated ring oscillator circuit consisting of 45-stage inverters was fabricated using the polysilicon gate NMOS process. The signal transfer delay time per inverter stage obtained in this experiment was about 0.8 nsec

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.38 no.2
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• pp.38-49
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• 2001

This paper presents a new voltage down converter(VDC) using charge and discharge current adjustment circuitry that provides high frequency application. This VDC consist of a common driving circuit and compensation circuits: 2 sensors and each driving transistors for controlling gate current of driving transistor. These sensors are operated as adaptive biasing method with high speed and low power consumption. This circuit is designed with a $0.62{\mu}m$ N well CMOS technology. In H-spice simulation results, internal voltage is bounded ( IV, +0.6V) in proposed circuitry when load current rapidly increases and decreases during Gns between 0 and $200m{\Lambda}$. And the recovery time of internal voltage is about 7ns and 10ns when load current increases and decreases respectively. That is fast better than common driving circuit. Total power consumption is about 1.2mW.

• Proceedings of the Materials Research Society of Korea Conference
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• 2010.05a
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• pp.54.2-54.2
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• 2010

최근까지는 주로 비정질 실리콘이 디스플레이의 채널층으로 상용화 되어왔다. 비정질 실리콘 기반의 박막 트랜지스터는 제작의 경제성 및 균일성을 가지고 있어서 널리 상용화되고 있다. 하지만 비정질 실리콘의 구조적인 문제인 낮은 전자 이동도(< $1\;cm^2/Vs$)로 인하여 디스플레이의 대면적화에 부적합하며, 광학적으로 불투명한 특성을 갖기 때문에 차세대 디스플레이의 응용에 불리한 점이 있다. 이런 문제점의 대안으로 현재 국내외 여러 연구 그룹에서 산화물 기반의 반도체를 박막 트랜지스터의 채널층으로 사용하려는 연구가 진행중이다. 산화물 기반의 반도체는 밴드갭이 넓어서 광학적으로 투명하고, 상온에서 증착이 가능하며, 비정질 실리콘에 비해 월등히 우수한 이동도를 가짐으로 디스플레이의 대면적화에 유리하다. 특히 Zinc Oxide의 경우, band gap이 3.4eV로써, transparent conductors, varistors, surface acoustic waves, gas sensors, piezoelectric transducers 그리고 UV detectors 등의 많은 응용에 쓰이고 있다. 또한, a-Si TFTs에 비해 ZnO-based TFTs의 경우 우수한 소자 성능과 신뢰성을 나타내며, 대면적 제조시 우수한 균일성 및 낮은 생산비용이 장점이다. 그러나 ZnO-baesd TFTs의 경우 일정한 bias 아래에서 threshold voltage가 이동하는 문제점이 displays의 소자로 적용하는데 매우 중요하고 문제점으로 여겨진다. 특히 gate insulator와 channel layer사이의 interface에서의 defect에 의한 charge trapping이 이러한 문제점들을 야기한다고 보고되어진다. 본 연구에서는 Zinc Oxide 기반의 박막 트랜지스터를 DC magnetron sputtering을 이용하여 상온에서 제작을 하였다. 또한, $Si_3N_4$ 기판 위에 electron cyclotron resonance (ECR) $O_2$ plasma 처리와 plasma-enhanced chemical vapor deposition (PECVD)를 통하여 $SiO_2$ 를 10nm 증착을 하여 interface의 개선을 시도하였다. 그리고 TFTs 소자의 출력 특성 및 전이 특성을 평가를 하였고, 소자의 field effect mobility의 값이 향상을 하였다. 또한 Temperature, Bias Temperature stability의 조건에서 안정성을 평가를 하였다. 이러한 interface treatment는 안정성의 향상을 시킴으로써 대면적 디스플레의 적용에 비정질 실리콘을 대체할 유력한 물질이라고 생각된다.

• Proceedings of the Korean Vacuum Society Conference
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• 1998.02a
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• pp.71-72
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• 1998

반도체 집적 공정의 발달로 차세대 소자용으로 30 A 이하의 극 박막 Si02 절연막이 요구되고 있으며, 현재 제품으로 50-70 A 두께의 절연막을 사용한 것이 발표되고 있다. 절연막의 두께가 앓아질수록 많은 문제가 발생할 수 있는데 그 예로 절연막의 breakdo때둥에 의한 신뢰성 특성의 악화, 절연막올 통한 direct tunneling leakage current, boron풍의 dopant 침투로 인한 소자 특성 ( (Threshold Voltage)의 불안, 전기적 stress하에서의 leakage current증가와 c charge-trap 및 피terface s쩌.te의 생성으로 인한 소자 특성의 변화 둥으로 요약 된다. 절연막의 특성올 개선하기 위해 여러 가지 새로운 공정들이 제안되었다. 그 예로, Nitrogen올 Si/Si02 계면에 doping하여 절연막의 특성을 개선하는 방법 으로 고온 열처 리 를 NH3, N20, NO 분위 기 에서 실시 하거 나, polysilicon 또는 s silicon 기판에 nitrogen올 이온 주입하여 열처리 하는 방법, 그리고 Plasma분 위기에서 Nitrogen 함유 Gas를 이용하여 nitrogen을 doping시키는 방법 둥이 연구되고 있다. 또한 Oxide cleaning 후 상온에서 성장되는 oxide를 최소화 하여 절연막의 특성올 개선하기 위하여 LOAD-LOCK을 이용하는 방법, C뼈피ng 공정의 개선올 통한 contamination 감소와 silicon surface roughness 감소 로 oxide 신뢰성올 개선하는 방법 둥이 있다. 구조적 인 측면 에 서 는 Polysilicon 의 g없n size 를 최 적 화하여 OxideIPolysilicon 의 계면 특성올 개선하는 연구와 Isolation및 Gate ETCH공정이 절연막의 특성에 미 치 는 영 향도 많이 연구되 고 있다 .. Plasma damage 가 Oxide 에 미 치 는 효과 를 제어하는 방법과 Deuterium열처리 퉁올 이용하여 Hot electron Stress하에서 의 MOS 소자의 Si/Si02 계면의 신뢰성을 개선하고 있다. 또한 극 박막 전연막의 신뢰성 특성올 통계적 분석올 통하여 사용 가능한 수명 올 예 측 하는 방법 과 Direct Tunneling Leakage current 를 고려 한 허 용 가농 한 동작 전 압 예측 및 Stress Induced Leakage Current 둥에 관해서 도 최 근 활발 한 연구가 진행되고 있다.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.470-470
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• 2012

Organic thin film transistors (OTFTs) backplane constitute the active elements in new generations of plastic electronic devices for flexible display. The overall OTFTs performance is largely depended on the properties and quality of each layers of device material. In solution based process of organic semiconductors (OSCs), the interface state is most impediments to preferable performance. Generally, a threshold voltage (Vth) shift is usually exhibited when organic gate insulators (OGIs) are exposed in an ambient air condition. This phenomenon was caused by the absorbed polar components (i.e. oxygen and moisture) on the interface between OGIs and Soluble OSCs during the jetting process. For eliminating the polar component at the interface of OGI, the role of high vacuum seasoning on an OGI for all solution processable OTFTs were studied. Poly 4-vinly phenols (PVPs) were the material chosen as the organic gate dielectric, with a weakness in ambient air. The high vacuum seasoning of PVP's surface showed improved performance from non-seasoning TFT; a $V_{th}$, a ${\mu}_{fe}$ and a interface charge trap density from -8V, $0.018cm^2V^{-1}s^{-1}$, $1.12{\times}10^{-12}(cm^2eV)^{-1}$ to -4.02 V, $0.021cm^2V^{-1}s^{-1}$, $6.62{\times}10^{-11}(cm^2eV)^{-1}$. These results of OTFT device show that polar components were well eliminated by the high vacuum seasoning processes.