• Journal of Power System Engineering
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• v.8 no.1
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• pp.62-68
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• 2004

This paper describes a fault tolerant control in distributed PLC(Programmable Logic Controller) system to ensure reliability of controllers which have some faults simultaneously. First, the behavior of PLC is modeled as discrete expressions using Galois field. Then, we design the control laws for additional spare controllers to generate parity code with two dimensions. Finally, the algorithm for estimating normal output instead of abnormal output from the controllers with fault is suggested. Comparing to the traditional duplication method, the suggested method can reduce the number of spare controllers significantly to ensure control reliability. This method will be applied to an automatic system in order to increase reliability. Also, it can improve cost performance of the system.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.10a
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• pp.1023-1024
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• 2015

This paper propose the method of constructing the improved hardware arithmetic operation unit over galois fields. The proposed the hardware arithmetic operation unit have advantage which is more regularity and extensibility compare with earlier method. Also it is able to apply to any multimedia hardware which is the basic arithmetic operation unit. For the future we will research the processor which is the processing arithmetic and logical operation.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.880-883
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• 2005

This paper presents a method of constructing the sequential logic machines over finite fields(or galois fields). The proposed the sequential logic machines is constructed by as following. First of all, we obtain the linear characteristics between present state and next state based on mathematical properties of finite fields and sequential logic machines. Next, we realize the sequential logic machines over finite field GF(P) using above linear characteristics and characteristic polynomial that expressed using by matrix.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.856-859
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• 2005

This paper presents a method of constructing the highly efficiency arithmetic operation unit systems(AOUS) based on fields. The proposed AOUS is more regularity and extensibility than previous methods. Also, the proposed AOUS be able to apply basic multimedia hardware. The future research is demanded to more compact and advanced arithmetic operation algorithm.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.3B
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• pp.355-361
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• 2001

유한체(Galois Field) 상에서의 곱셈(multiplication)을 구현하는 방법은 크게 병렬 곱셈기(parallel multiplier)와 직렬 곱셈기(serial multiplier)로 나누어질 수 있는데, 구현시 하드웨어 면적을 작게 차지한다는 장점 때문에 직렬 곱셈기가 널리 사용된다. 하지만 이 직렬 곱셈기를 이용하여 계산을 하기 위해서는 병렬 곱셈기에 비해 많은 시간이 필요하게 된다. 직렬기법과 병렬기법의 결합이 이를 보완할 수 있게 된다. 본 논문에서는 복잡도는 직렬 곱셈기와 큰 차이가 없으면서 연산시간을 줄인 곱셈기*(multiplier)를 제안하였다. 이 곱셈기를 사용하면 복잡도는 크게 늘어나지 않았으면서 유한체 상에서의 곱셈을 하는데 필요한 시간을 줄이는 효과를 얻을 수 있다.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.4
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• pp.460-465
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• 1986

In this paper, a method for constructing of the sequential multiple-valued logic circuits over Galois field GF(px) is proposed. First, we derive the Talyor series over Galois field and the unique matrices which accords with the number of the element over the finite field, and we constdruct sequential multiple-valued logic circuits using these matrices. Computational procedure for traditional polynomial expansion can be reduced by using this method. Also, single and multi-input circuits can be easily implemented.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.9
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• pp.1786-1792
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• 2015

Random linear network coding (RLNC) is widely employed to enhance the reliability of wireless multicast. In RLNC encoding/decoding, Galois Filed (GF) arithmetic is typically used since all the operations can be performed with symbols of finite bits. Considering the architecture of commercial computers, the complexity of arithmetic operations is constant regardless of the dimension of GF m, if m is smaller than 32 and pre-calculated tables are used for multiplication/division. Based on this, we show that the complexity of RLNC inversely proportional to m. Considering additional overheads, i.e., the increase of header length and memory usage, we determine the practical value of m. We implement RLNC in a commercial computer and evaluate the codec throughput with respect to the type of the tables for multiplication/division and the number of original packets to encode with each other.

• Journal of Navigation and Port Research
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• v.28 no.1
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• pp.23-29
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• 2004

This paper deals with Reed-Solomon Coding for EUROFIX system EUROFIX is an integrated navigation and communication system, which combines Differential GNSS and Loran-C EUROFIX transmits DGNSS(Differential Global Navigation Satellite Systems) (data by pulse position modulation of Loran-C pulses. Loran-C system is regarded as a satellite backup system in recent. And now, it is important to detect and correct much errors in communication systems. Error corrections or correction algorithm is actively studied nowadays because of this. In this paper, we study and design encoder and decoder of Reed Solomon Code using Finite Galois Field Fourier Transformation for error corrections in EUROFIX data transmission. Through extensive simulation, the designed Reed Solomon code is shown to be effective for error correction in EUROFIX data transmission.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.2A
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• pp.80-85
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• 2003

This paper proposes Galois Field Arithmetic Unit(GFAU) whose structure does addition, multiplication and division in GF(2m). GFAU can execute maximum two additions, or two multiplications, or one addition and one multiplication. The base architecture of this GFAU is a divider based on modified Euclid's algorithm. The divider was modified to enable multiplication and addition, and the modified divider with the control logic became GFAU. The GFAU for GF(2193) was implemented with Verilog HDL with top-down methodology, and it was improved and verified by a cycle-based simulator written in C-language. The verified model was synthesized with Samsung 0.35um, 3.3V CMOS standard cell library, and it operates at 104.7MHz in the worst case of 3.0V, 85$^{\circ}C$, and it has about 25,889 gates.

• Convergence Security Journal
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• v.18 no.4
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• pp.27-33
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• 2018

Stream cipher is an one-time-pad type encryption algorithm that encrypt plaintext using simple operation such as XOR with random stream of bits (or characters) as symmetric key and its security depends on the randomness of used stream. Therefore we can design more secure stream cipher algorithm by using mathematical analysis of the stream such as period, linear complexity, non-linearity, correlation-immunity, etc. The key stream in stream cipher is generated in linear feedback shift register(LFSR) having characteristic polynomial. The primitive polynomial is the characteristic polynomial which has the best security property. It is used widely not only in stream cipher but also in SEED, a block cipher using 8-degree primitive polynomial, and in Chor-Rivest(CR) cipher, a public-key cryptosystem using 24-degree primitive polynomial. In this paper we present the concept and various properties of primitive polynomials in Galois field and prove the theorem finding the number of irreducible polynomials and primitive polynomials over $F_p$ when p is larger than 2. This kind of research can be the foundation of finding primitive polynomials of higher security and developing new cipher algorithms using them.