• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.11-11
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• 2008

ZnO has a very large exciton binding energy (60 meV) as well as thermal and chemical stability, which are expected to allow efficient excitonic emission, even at room temperature. ZnO based electronic devices have attracted increasing interest as the backplanes for applications in the next-generation displays, such as active-matrix liquid crystal displays (AMLCDs) and active-matrix organic light emitting diodes (AMOLEDs), and in solid state lighting systems as a substitution for GaN based light emitting diodes (LEDs). Most of these electronic devices employ the electrical behavior of n-type semiconducting active oxides due to the difficulty in obtaining a p-type film with long-term stability and high performance. p-type ZnO films can be produced by substituting group V elements (N, P, and As) for the O sites or group I elements (Li, Na, and K) for Zn sites. However, the achievement of p-type ZnO is a difficult task due to self-compensation induced from intrinsic donor defects, such as O vacancies (Vo) and Zn interstitials ($Zn_i$), or an unintentional extrinsic donor such as H. Phosphorus (P) doped ZnO thin films were grown on c-sapphire substrates by radio frequency magnetron sputtering with various Ar/ $O_2$ gas ratios. Control of the electrical types in the P-doped ZnO films was achieved by varying the gas ratio with out post-annealing. The P-doped ZnO films grown at a Ar/ $O_2$ ratio of 3/1 showed p-type conductivity with a hole concentration and hole mobility of $10^{-17}cm^{-3}$ and $2.5cm^2/V{\cdot}s$, respectively. X-ray diffraction showed that the ZnO (0002) peak shifted to lower angle due to the positioning of $p^{3-}$ ions with a smaller ionic radius in the $O^{2-}$ sites. This indicates that a p-type mechanism was due to the substitutional Po. The low-temperature photoluminescence of the p-type ZnO films showed p-type related neutral acceptor-bound exciton emission. The p-ZnO/n-Si heterojunction LEO showed typical rectification behavior, which confirmed the p-type characteristics of the ZnO films in the as-deposited status, despite the deep-level related electroluminescence emission.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.08a
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• pp.53-53
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• 2011

This paper describes results for surface and bulk characterization of the most promising thin film solar cell material for high performance devices, (Ag,Cu) (In,Ga) Se2 (ACIGS). This material in particular exhibits a range of exotic behaviors. The surface and general materials science of the material also has direct implications for the operation of solar cells based upon it. Some of the techniques and results described will include scanning probe (AFM, STM, KPFM) measurements of epitaxial films of different surface orientations, photoelectron spectroscopy and inverse photoemission, Auger electron spectroscopy, and more. Bulk measurements are included as support for the surface measurements such as cathodoluminescence imaging around grain boundaries and showing surface recombination effects, and transmission electron microscopy to verify the surface growth behaviors to be equilibrium rather than kinetic phenomena. The results show that the polar close packed surface of CIGS is the lowest energy surface by far. This surface is expected to be reconstructed to eliminate the surface charge. However, the AgInSe2 compound has yielded excellent atomic-resolution images of the surface with no evidence of surface reconstruction. Similar imaging of CuInSe2 has proven more difficult and no atomic resolution images have been obtained, although current imaging tunneling spectroscopy images show electronic structure variations on the atomic scale. A discussion of the reasons why this may be the case is given. The surface composition and grain boundary compositions match the bulk chemistry exactly in as-grow films. However, the deposition of the heterojunction forming the device alters this chemistry, leading to a strongly n-type surface. This also directly explains unpinning of the Fermi level and the operation of the resulting devices when heterojunctions are formed with the CIGS. These results are linked to device performance through simulation of the characteristic operating behaviors of the cells using models developed in my laboratory.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.180-180
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• 2010

Thin film transistors (TFTs) based on oxide semiconductors have emerged as a promising technology, particularly for active-matrix TFT-based backplanes. Currently, an amorphous oxide semiconductor, such as InGaZnO, has been adopted as the channel layer due to its higher electron mobility. However, accurate and repeatable control of this complex material in mass production is not easy. Therefore, simpler polycrystalline materials, such as ZnO and $SnO_2$, remain possible candidates as the channel layer. Inparticular, ZnO-based TFTs have attracted considerable attention, because of their superior properties that include wide bandgap (3.37eV), transparency, and high field effect mobility when compared with conventional amorphous silicon and polycrystalline silicon TFTs. There are some technical challenges to overcome to achieve manufacturability of ZnO-based TFTs. One of the problems, the stability of ZnO-based TFTs, is as yet unsolved since ZnO-based TFTs usually contain defects in the ZnO channel layer and deep level defects in the channel/dielectric interface that cause problems in device operation. The quality of the interface between the channel and dielectric plays a crucial role in transistor performance, and several insulators have been reported that reduce the number of defects in the channel and the interfacial charge trap defects. Additionally, ZnO TFTs using a high quality interface fabricated by a two step atomic layer deposition (ALD) process showed improvement in device performance In this study, we report the fabrication of high performance ZnO TFTs with a $Si_3N_4$ gate insulator treated using plasma. The interface treatment using electron cyclotron resonance (ECR) $O_2$ plasma improves the interface quality by lowering the interface trap density. This process can be easily adapted for industrial applications because the device structure and fabrication process in this paper are compatible with those of a-Si TFTs.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.11
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• pp.900-904
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• 2011

In this paper, we investigated an anomalous hump phenomenon under the positive bias stress in p-type LTPS TFTs. The devices with inferior electrical performance also show larger hump phenomenon. which can be explained by the sub-channel induced from trapped electrons under thinner gate oxide region. We can confirm that the devices with larger hump have larger interface trap density ($D_{it}$) and grain boundary trap density ($N_{trap}$) extracted by low-high frequency capacitance method and Levinson-Proano method, respectively. From the C-V with I-V transfer characteristics, the trapped electrons causing hump seem to be generated particularly from the S/D and gate overlapped region. Based on these analysis, the major cause of an anomalous hump phenomenon under the positive bias stress in p-type poly-Si TFTs is explained by the GIDL occurring in the S/D and gate overlapped region and the traps existing in the channel edge region where the gate oxide becomes thinner, which can be inferred by the fact that the magnitude of the hump is dependent on the average trap densities.

• Transactions of Materials Processing
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• v.29 no.5
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• pp.257-264
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• 2020

This paper is concerned with the influence of the plastic property of the rivet on the numerical prediction of the Self-Piercing Rivet (SPR) Joining. In order to predict the plastic property of the rivet, a ring compression specimen was directly fabricated from the rivet used for the mechanical joining of dissimilar materials, and the FE analysis together with the ring compression test was iteratively carried out by changing the plastic property of the rivet. For reliable FE analysis, a friction coefficient was estimated based on a friction calibration curve, measuring the reductions in inner diameter and height of the ring specimen after the compression test. From each simulation result, the force-displacement curves were then compared from each other so as to obtain the rivet plastic property that shows good agreement with the experimental result. The SPR joining between GA590 1.0t and Al5052 2.0t was conducted, and the numerical prediction was performed with the use of the plastic property evaluated based on the inverse analysis and the one referred from Mori et al. [11]. Comparison of the experiment and the numerical predictions in terms of the interlock and bottom thickness revealed that the reliable evaluation of the plastic property of the rivet is necessary for the trustworthy numerical prediction of the SPR joining.

• Tribology and Lubricants
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• v.35 no.5
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• pp.274-285
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• 2019

Chemical mechanical polishing (CMP), which is a material removal process involving chemical surface reactions and mechanical abrasive action, is an essential manufacturing process for obtaining high-quality semiconductor surfaces with ultrahigh precision features. Recent rapid growth in the industries of digital devices and semiconductors has accelerated the demands for processing of various substrate and film materials. In addition, to solve many issues and challenges related to high integration such as micro-defects, non-uniformity, and post-process cleaning, it has become increasingly necessary to approach and understand the processing mechanisms for various substrate materials and abrasive particle behaviors from a tribological point of view. Based on these backgrounds, we review recent CMP R&D trends in this study. We examine experimental and analytical studies with a focus on substrate materials and abrasive particles. For the reduction of micro-scratch generation, understanding the correlation between friction and the generation mechanism by abrasive particle behaviors is critical. Furthermore, the contact stiffness at the wafer-particle (slurry)-pad interface should be carefully considered. Regarding substrate materials, recent research trends and technologies have been introduced that focus on sapphire (${\alpha}$-alumina, $Al_2O_3$), silicon carbide (SiC), and gallium nitride (GaN), which are used for organic light emitting devices. High-speed processing technology that does not generate surface defects should be developed for low-cost production of various substrates. For this purpose, effective methods for reducing and removing surface residues and deformed layers should be explored through tribological approaches. Finally, we present future challenges and issues related to the CMP process from a tribological perspective.