• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.10 no.2
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• pp.168-175
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• 2017

In this paper, a 5V small-area NMOS-diode eFuse OTP memory cell is proposed. This cell which is used in PMICs consists of a 5V NMOS transistor and an eFuse link as a memory part, based on a BCD process. Also, a regulated voltage of V2V ($=2.0V{\pm}10%$) instead of the conventional VDD is used to the pull-up loads of a VREF circuit and a BL S/A circuit to obtain a wider operational voltage range of the eFuse memory cell. When this proposed cells are used in the simulation, their sensing resistances are found to be $15.9k{\Omega}$ and $32.9k{\Omega}$, in the normal read mode and in the program-verify-read mode, respectively. Furthermore, the read current flowing through a non-blown eFuse is restricted to $97.7{\mu}A$. Thus, the eFuse link of a non-blown eFuse OTP memory cell is kept non-blown. The layout area of the designed 1kb eFuse OTP memory IP based on Dongbu HiTek's BCD process is $168.39{\mu}m{\times}479.45{\mu}m(=0.08mm^2)$.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.16 no.6
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• pp.509-518
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• 2023

In this paper, we designed a 4Kb poly-fuse OTP IP (Intellectual Property) required for analog circuit trimming and calibration. In order to reduce the BL resistance of the poly-fuse OTP cell, which consists of an NMOS select transistor and a poly-fuse link, the BL stacked metal 2 and metal 3. In order to reduce BL routing resistance, the 4Kb cells are divided into two sub-block cell arrays of 64 rows × 32 rows, with the BL drive circuit located between the two 2Kb sub-block cell arrays, which are split into top and bottom. On the other hand, in this paper, we propose a core circuit for an OTP cell that uses one poly-fuse link to one select transistor. In addition, in the early stages of OTP IP development, we proposed a data sensing circuit that considers the case where the resistance of the unprogrammed poly-fuse can be up to 5kΩ. It also reduces the current flowing through an unprogrammed poly-fuse link in read mode to 138㎂ or less. The poly-fuse OTP cell size designed with DB HiTek 90nm CMOS process is 11.43㎛ × 2.88㎛ (=32.9184㎛2), and the 4Kb poly-fuse OTP IP size is 432.442㎛ × 524.6㎛ (=0.227mm²).

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.7
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• pp.1371-1378
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• 2009

We propose a low-power eFuse one-time programmable (OTP) memory cell based on a logic process. The eFuse OTP memory cell uses separate transistors optimized at program and read mode, and reduces an operation current at read mode by reducing parasitic capacitances existing at both WL and BL. Asynchronous interface, separate I/O, BL SA circuit of digital sensing method are used for a low-power and small-area eFuse OTP memory IP. It is shown by a computer simulation that operation currents at a logic power supply voltage of VDD and at I/O interface power supply voltage of VIO are 349.5${\mu}$A and 3.3${\mu}$A, respectively. The layout size of the designed eFuse OTP memory IP with Dongbu HiTek's 0.18${\mu}$m generic process is 300 ${\times}$557${\mu}m^2$.

• Proceedings of the KIEE Conference
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• 1998.07d
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• pp.1525-1527
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• 1998

The line-fuse which one of device most widely used in distributed line system has a ability to cut off the fault current flow into the house. But this device can be used only one time. So there are many waste of human power and money to exchange acted line-fuse. In this paper, we designed new type of line-fuse melting zone using by different union metal, so line-fuse can be reused after once operated.

• Proceedings of the KIEE Conference
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• 1997.07d
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• pp.1205-1209
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• 1997

When the short fault current is flowed into a fuse, the notch of element is melted, and burnbacked by arc plasma, which caused by the voltage of fuse at both ends. The cutoff ability of fuse is heavily influenced by the degree of burnback. In this paper, we investigated the amount of burnback to the applied voltage di/dt variation, As a result, we confirmed that the amount of burnback is proportional to the variation of the applied voltage.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.2
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• pp.306-316
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• 2016

In this paper, an NMOS-diode eFuse OTP (One-Time Programmable) memory cell is proposed using a parasitic junction diode formed between a PW (P-Well), a body of an isolated NMOS (N-channel MOSFET) transistor with the small channel width, and an n+ diffusion, a source node, in a DNW (Deep N-Well) instead of an NMOS transistor with the big channel width as a program select device. Blowing of the proposed cell is done through the parasitic junction formed in the NMOS transistor in the program mode. Sensing failures of '0' data are removed because of removed contact voltage drop of a diode since a NMOS transistor is used instead of the junction diode in the read mode. In addition, a problem of being blown for a non-blown eFuse from a read current through the corresponding eFuse OTP cell is solved by limiting the read current to less than $100{\mu}A$ since a voltage is transferred to BL by using an NMOS transistor with the small channel width in the read mode.

• Aerospace Engineering and Technology
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• v.10 no.2
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• pp.56-64
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• 2011

In this paper, the characteristics of LCL set-up parameters for the satellite load distribution are analyzed under the electrical system environment, implemented the LCL circuits and evaluated the performance and its behaviour. Recently, it is implemented the load distribution circuit by latching current limiter(LCL) rather than conventional fuse and relay for the protection of the satellite power system from a fault load. The LCL circuit is composed of the electrical components, not mechanical parts with the fuse and relay. When detected the over current on a fault load, it is activated to maintain the trip-off level for set-up time and then cut-off the load power by the active control. It is more flexible and provided a chance to reuse of the load in case of temporarily event, but the fuse and relay can't be used again after activating due to the physical disconnection. However, for implementation of LCL circuit, it should be carefully considered the behavior of the LCL circuit under the worst electrical system environment and applied it to define the set-up parameters related with over-current inhibition.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2006.11a
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• pp.258-261
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• 2006

This study introduces the control of duration time of impulse noises emitted from a high voltage COS fuse of a transformer. When a high voltage COS fuse becomes a short circuit by the over current, the peak sound pressure level over 150 dB(A) is generated at the distance of 2m from a COS Fuse. For the purpose of the reduction of impulse noise, in this study, the reactive type silencer has been utilized. And also electrical interrupting test was experimented. From the experimental results, the reactive type silencer has been shown to have the noise reduction of about 13 dB(A). It has been found that the electrical interception performance of the COS fuse was related to the control of the duration time of impulse noise.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.15 no.6
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• pp.3827-3831
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• 2014

This paper aims to solve the problem deterioration of power fuses. The deterioration of a power fuse is a cause of failure misoperation by a normal current flowing reduplicatively to fuse the element. An extension survey of a load feature rerating power fuse examined the power fuse deterioration removal, the cause of the deterioration of the power fuse, the front-after, and the thermal variation of the inside transformer room electric power equipment. The transformer showed an average improvement of $6[^{\circ}C]$. The temperature of the electrical line showed $7{\sim}8[^{\circ}C]$ improvement. The static condenser and direct reactor was $2{\sim}3[^{\circ}C]$ high-state maintenance the temperature and equipment syntonization relationship. In the subject of study $0.5{\sim}1.0[^{\circ}C]$ stabilizing three phase power fuse temperature differential was. Suggestion in the transformer room environment power equipment between the cause temperature happen elimination to deterioration of power fuse and temperature rise control.

• Proceedings of the KAIS Fall Conference
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• 2006.11a
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• pp.176-179
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• 2006

We are using COS to purpose blocking the excess current and to protect the transformer. But the fuse of COS is melt due to the overload if the excess current flows and it destroy an air severing relations to clear as strong arc happens. Such phenomenon induces an impact ambient noise and it gives the circumstance area resident or pedestrian the fear. Thus, We are the actual circumstances which an ambient noise countermeasure establishment have desired urgently. In this study, we grasp the characteristic of an impact ambient noise which a COS fuse happens the melting and study the method to reduce an impact ambient noise.