• The Transactions of the Korean Institute of Electrical Engineers
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• v.43 no.4
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• pp.533-542
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• 1994

This paper presents the new algorithm for fault analysis and this algorithm obtains requisite term for fault analysis by the two-port network technique. Therefore, the fault calculation time is composed of only few fundamental arithmetic calculation. The graphic user environment for fault analysis is implemented in mouse-oriented user interface with window and pull-down menu. The result of the algorithm proved to be identical with the sample system in Ref.[8]. this package can be a useful tool for fault analysis.

• Journal of the Korean Institute of Navigation
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• v.19 no.1
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• pp.17-32
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• 1995

SART(Search and Rescue Radar Transponder) is a radar transponder capable of operating in the 9GHz band, which is one element of GMDSS. The fundamental function of the SART is to indicate its position. Thus, it is so much available to assist SAR operation when an emergency and casualty occur at any sea area. In the thesis, we designed, manufactured each part of circuit to develop the advanced SART and configured to test the characteristics in many ways. As the result of detailed things, we confirmed that the developed SART could be high possibility of production.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.11
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• pp.1034-1046
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• 2013

In this paper, a design of a GaN HEMT power amplifier using output matching circuit with arbitrary harmonic impedances is presented. The adopted GaN HEMT device, TGF2023-02 of TriQuint Semiconductor, was packaged in commercial package. The optimal impedances of the GaN HEMT package are extracted from load-pull simulation at package input and output reference planes. The targets of load-pull simulation are the highest output power at fundamental frequency and the highest efficiency at $2^{nd}$ and $3^{rd}$ harmonic frequencies. Because of fixture in the package, the extracted impedances shows arbitrary harmonic impedances. In order to match the optimal impedances, output matchin circuit which has 4 transmission lines is presented. Characteristic impedances and electrical lengths of the transmission lines are mathmatically calculated. The power amplfiier with $54.6{\times}40mm^2$ shows the output power of 8 W at the fundamental frequency of 2.5 GHz, the efficiency above 55 %, and harmonic suppression of above 35 dBc at the $2^{nd}$ and the $3^{rd}$ harmonics.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.1 s.92
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• pp.49-55
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• 2005

In this paper, the phase locked harmonic oscillator(PLHO) using the analog PLL(Phase Locked Loop) is designed and implemented for a wireless LAN system. The harmonic oscillator is consisted of a ring resonator, a varactor diode and a PLL circuit. Because the fundamental fiequency of 8.5 GHz is used as the feedback signal for the PLL and the 2nd harmonic of 17.0 GHz is used as the output, a analog frequency divider for the phase comparison in the PLL system can be omitted. For the simple PLL circuit, the SPD(Sampling Phase Detector) as a phase comparator is used. The output power of the phase locked harmonic oscillator is 2.23 dBm at 17 GHz. The fundamental and 3rd harmonic suppressions are -31.5 dBc and -29.0 dBc, respectively. The measured phase noise characteristics are -87.6 dBc/Hz and -95.4 dBc/Hz at the of offset frequency of 1 kHz and 10 kHz from the carrier, respectively.

• Journal of Satellite, Information and Communications
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• v.7 no.2
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• pp.76-79
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• 2012

Satellite power system is critical for mission design and survival operation. Accordingly power conversion circuit has to stable design and verify for operation condition change (load, voltage, thermal condition). however, multi-stage make complicate for modeling and get all state solution. In this paper present all state solution for multi-stage converter by using Extended Describing Function(EDF) modelling. EDF modelling has merit to solve complex circuit but it has limit too. Because of fundamental approximation, EDF modeling is not match all topology. Consequently, we verify passible topology for EDF modeling and stable design multi-stage converter.

• Journal of Advanced Navigation Technology
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• v.6 no.1
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• pp.52-62
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• 2002

Electrical characteristics of two types of 20 GHz Push-Push GaAs MESFET dielectric resonator oscillators having Wilkinson and T-junction power combiners for the output stage have been investigated. The Push-Push oscillator for suppressing fundamental frequency 10 GHz and enhancing 20 GHz has been designed and realized in microstrip configuration on 20 mil thick RT-Duroid(${\varepsilon}_r$=2.52) teflon substrate. Two different types of power combiners, T-junction and Wilkinson, have been considered. Whenever one type of the combiners has been adopted for the output circuit, output power, phase noise and fundamental frequency suppression characteristics of the oscillator have been measured. When the Wilkinson power combiner was used, a maximum output power of 5.67 dBm, a phase noise of -105.5 dBc/Hz at an offset frequency of 100 kHz and a fundamental frequency suppression of -29.33 dBc have been measured. When the T-junction power combiner was used, a maximum output power of -1.17 dBm, a phase noise of -102.2 dBc/Hz at an offset frequency of 100 kHz and a fundamental frequency suppression of -17.84 dBc have been measured.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.8
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• pp.798-804
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• 2013

In this paper, conducted emission from the LDC(Low-Side DC/DC Converter) of a HEV/EV was analyzed using high-frequency circuit modeling in system-level approach. The conducted emission by PWM process(100 kHz; Switching Frequency) can cause RFI(Radio-Frequency Interference) problems in the AM/FM frequency range. In order to mitigate this conducted emission, a high-frequency equivalent circuit model is proposed by analyzing the fundamental circuits, parasitic components in their parts and connections and non-linear characteristics of MOSFETs, high-power capacitors, inverters, motors, high-power cables, and bus bars which are composed of the LDC. Using these circuit models, results of both simulation and measurement were compared and similarities between them were verified. We are looking forward that this approach can be effectively used in the EMC design of HEV/EV.

• Journal of Electrical Engineering and Technology
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• v.11 no.6
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• pp.1656-1663
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• 2016

A capacitive wireless power transfer (C-WPT) system uses an electric field to transmit power through a physical isolation barrier which forms a pair of ac link capacitors between the metal plates. However, the physical dimension and low dielectric constant of the interface medium severely limit the effective link capacitance to a level comparable to the main switch output capacitance of the transmitting circuit, which thus narrows the soft-switching range in the light load condition. Moreover, by fundamental limit analysis, it can be proved that such a low link capacitance increases operating frequency and capacitor voltage stress in the full load condition. In order to handle these problems, this paper investigates optimal design of double matching transformer networks for C-WPT. Using mathematical analysis with fundamental harmonic approximation, a design guideline is presented to avoid unnecessarily high frequency operation, to suppress the voltage stress on the link capacitors, and to achieve wide ZVS range even with low link capacitance. Simulation and hardware implementation are performed on a 5-W prototype system equipped with a 256-pF link capacitance and a 200-pF switch output capacitance. Results show that the proposed scheme ensures zero-voltage-switching from full load to 10% load, and the switching frequency and the link capacitor voltage stress are kept below 250 kHz and 452 V, respectively, in the full load condition.

• Journal of Power Electronics
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• v.14 no.2
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• pp.292-301
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• 2014

This paper presents a new configuration for a three-phase multilevel voltage source inverter. The main bridge is built from a classical three-phase two-level inverter and three bidirectional switches. A variable DC-link employing two unequal DC voltage supplies and four switches is connected to the main circuit in such a way that the proposed inverter produces four levels in the output voltage waveform. In order to obtain the desired switching gate signals, the fundamental frequency staircase modulation technique is successfully implemented. Furthermore, the proposed structure is extended and compared with other types of multilevel inverter topologies. The comparison shows that the proposed inverter requires a smaller number of power components. For a given number of voltage steps N, the proposed inverter requires N/2 DC voltage supplies and N+12 switches connected with N+7 gate driver circuits, while diode clamped or flying capacitor inverters require N-1 DC voltage supplies and 6(N-1) switches connected with 6(N-1) gate driver circuits. A prototype of the introduced configuration has been manufactured and the obtained simulation and experimental results ensure the feasibility of the proposed topology and the validity of the implemented modulation technique.

• Proceedings of the IEEK Conference
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• 2002.07b
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• pp.1062-1065
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• 2002

We demonstrate the MMIC(monolithic microwave integrated circuit) frequency doublers generating stable and low-cost 29 ㎓ local oscillator signals from 14.5 ㎓ input signals. These devices were designed and fabricated by using the MMIC integration process of 0.1 $\mu\textrm{m}$ gate-length PHEMTs (pseudomorphic high electron mobility transistors). The measurements showed S$\_$11/ of -9.2 dB at 14.5 ㎓, S/sub22/ of -18.6 dB at 29 ㎓ and a minimum conversion loss of 18.2 dB at 14.5 ㎓ with an input power of 6 dBm. The fundamental signal of 14.5㎓ was suppressed below 15.2 dBc compared with the second harmonic signal at the output port, and the isolation characteristics of the fundamental signal between the input and the output port were maintained above 30 dB in the frequency range of 10.5 ㎓ to 18.5 ㎓.