• Title/Summary/Keyword: Function Structure Block Diagram

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Reliability Prediction of Satellite by Function Analysis (기능분석을 통한 인공위성의 신뢰도 예측)

  • Yoo, Ki-Hoon;Kim, Gi-Young;Ahn, Yeong-Gi;Cha, Dong-Won;Shin, Goo-Hwan;Kim, Dong-Guk;Chae, Jang-Soo;Jang, Joong-Soon
    • Journal of Applied Reliability
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    • v.15 no.1
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    • pp.44-51
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    • 2015
  • In this study, we propose reliability prediction of a satellite by function analysis. To do so, the intended functions of the satellite are derived from using function structure block diagram, and defined as main, sub, and detailed functions. Furthermore, in order to generate function and reliability structure table, reliability model rule, duty cycle, and types of switch are assigned to the classified functions. This study also establishes reliability block diagram and mathematical reliability models to schematize the relationship among the functions. The reliability of the classified function is estimated by calculating the failure rate of parts comprising them. Finally, we apply the proposed method to a small satellite as a case study. The result shows that the reliability for the detailed function and the sub function as well as the main function could be predicted quantitatively and accurately by the proposed approach.

A Structural Testing Strategy for PLC Programs Specified by Function Block Diagram (함수 블록 다이어그램으로 명세된 PLC 프로그램에 대한 구조적 테스팅 기법)

  • Jee, Eun-Kyoung;Jeon, Seung-Jae;Cha, Sung-Deok
    • Journal of KIISE:Software and Applications
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    • v.35 no.3
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    • pp.149-161
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    • 2008
  • As Programmable Logic Controllers(PLCs) are frequently used to implement real-time safety critical software, testing of PLC software is getting more important. We propose a structural testing technique on Function Block Diagram(FBD) which is one of the PLC programming languages. In order to test FBD networks, we define templates for function blocks including timer function blocks and propose an algorithm based on the templates to transform a unit FBD into a flowgraph. We generate test cases by applying existing testing techniques to the generated flowgraph. While the existing FBD testing technique do not consider infernal structure of FBD to generate test cases and can be applied only to FBD from which the specific intermediate model can be generated, this approach has advantages of systematic test case generation considering infernal structure of FBD and applicability to any FBD without regard to its intermediate format. Especially, the proposed method enables FBD networks including timer function blocks to be tested thoroughly. To demonstrate the effectiveness of the proposed method, we use trip logic of bistable processor of digital nuclear power plant protection systems which is being developed in Korea.

A Method of Low Power VLSI Design using Modified Binary Dicision Diagram (MBDD를 이용한 저전력 VLSI설계기법)

  • Yun, Gyeong-Yong;Jeong, Deok-Jin
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.49 no.6
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    • pp.316-321
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    • 2000
  • In this paper, we proposed MBDD(Modified Binary Decision Diagram) as a multi-level logic synthesis method and a vertex of MBDD to NMOS transistors matching. A vertex in MBDD is matched to a set of NMOS transistors. MBDD structure can be achieved through transformation steps from BDD structure. MBDD can represent the same function with less vertices less number of NMOS transistors, consequently capacitance of the circuit can be reduced. Thus the power dissipation can be reduced. We applied MBDD to a full odder and a 4-2compressor. Comparing the 4-2compressor block with other synthesis logic, 31.2% reduction and 19.9% reduction was achieved in numbers of transistors and power dissipation respectively. In this simulation we used 0.8 ${\mu}{\textrm}{m}$ fabrication parameters.

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Improvement Strategy of System Unavailability by Review of Logical Structure and Reliability Importance of Reliability Block Diagram (RED) and Fault Tree Analysis (FTA) (RBD와 FTA의 논리구조와 신뢰성 중요도의 고찰에 의한 시스템 비시간가동률 개선방안)

  • Choi, Sung-Woon
    • Journal of the Korea Safety Management & Science
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    • v.13 no.3
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    • pp.45-53
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    • 2011
  • The research proposes seven elimination rules of redundant gates and blocks in Fault Tree Analysis (FTA) and Reliability Block Diagram (RBD). The computational complexity of cut sets and path sets is NP-hard. In order to reduce the complexity of Minimal Cut Set (MCS) and Minimal Path Set (MPS), the paper classifies generation algorithms. Moreover, the study develops six implementation steps which reflect structural importance (SI) and reliability importance (RI) from Reliability Centered Maintenance (RCM) that a priority of using the functional logic among components is to reduce (improve) the system unavailability (or availability). The proposed steps include efficient generation of state structure function by Rare Event Enumeration (REA). Effective use of importance measures, such as SI and ill measures, is presented based on the number and the size of MCS and MPS which is generated from the reference[5] of this paper. In addition, numerical examples are presented for practitioners to obtain the comprehensive understanding of six steps that is proposed in this research.

Electromagnetic actuator design for the control of light structures

  • Der Hagopian, Johan;Mahfoud, Jarir
    • Smart Structures and Systems
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    • v.6 no.1
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    • pp.29-38
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    • 2010
  • An ElectroMagnetic Actuator (EMA) is designed and assessed numerically and experimentally. The EMA has the advantage to be without contact with the structure so it could be applied to light and small mechanism. Nevertheless, the open-loop instability and the nonlinear dynamic behavior with respect to the excitation frequency could limit its application field. The EMA is designed and dimensioned as a function of the experimental structure to be controlled. An inverse model of the EMA is proposed in order to implement a linear action block for the used frequency range. The control strategy is a fuzzy controller with displacements and velocities as inputs. A fuzzy controller of Takagi-Sugeno type is used. The air gap is estimated by using a modal approximation of the displacements issued from all measurements. Several configurations of control are assessed by using numerical simulations. The block diagram used for numerical simulations is implemented under Dspace$^{(R)}$ environment. The implemented controller was tested experimentally in the context of impact perturbations. The results obtained show the effectiveness of the developed procedures and the robustness of the implemented control.

Control Level Process Modeling Methodology Based on PLC (PLC 기반 제어정보 모델링 방법론)

  • Ko, Min-Suk;Kwak, Jong-Geun;Wang, Gi-Nam;Park, Sang-Chul
    • Journal of the Korea Society for Simulation
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    • v.18 no.4
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    • pp.67-79
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    • 2009
  • Because a product in the car industry has a short life cycle in recent years, the process planning and the manufacturing lines have to be changed frequently. Most of time, repositioning an existing facility and modifying used control information are faster than making completely new process planning. However, control information and control code such as PLC code are difficult to understand. Hence, industries prefer writing a new control code instead of using the existing complex one. It shows the lack of information reusability in the existing process planning. As a result, to reduce this redundancy and lack of reusability, we propose a SOS-Net modeling method. SOS-Net is a standard methodology used to describe control information. It is based on the Device Structure which consists of sensor information derived from device hardware information. Thus, SOS-Net can describe a real control state for automated manufacturing systems. The SOS-Net model is easy to understand and can be converted into PLC Code easily. It also enables to modify control information, thus increases the reusability of the new process planning. Proposed model in this paper plays an intermediary role between the process planning and PLC code generation. It can reduce the process planning and implementation time as well as cost.

A Maximum Likelihood Estimator Based Tracking Algorithm for GNSS Signals

  • Won, Jong-Hoon;Pany, Thomas;Eissfeller, Bernd
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • v.2
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    • pp.15-22
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    • 2006
  • This paper presents a novel signal tracking algorithm for GNSS receivers using a MLE technique. In order to perform a robust signal tracking in severe signal environments, e.g., high dynamics for navigation vehicles or weak signals for indoor positioning, the MLE based signal tracking approach is adopted in the paper. With assuming white Gaussian additive noise, the cost function of MLE is expanded to the cost function of NLSE. Efficient and practical approach for Doppler frequency tracking by the MLE is derived based on the assumption of code-free signals, i.e., the cost function of the MLE for carrier Doppler tracking is used to derive a discriminator function to create error signals from incoming and reference signals. The use of the MLE method for carrier tracking makes it possible to generalize the MLE equation for arbitrary codes and modulation schemes. This is ideally suited for various GNSS signals with same structure of tracking module. This paper proposes two different types of MLE based tracking method, i.e., an iterative batch processing method and a non-iterative feed-forward processing method. The first method is derived without any limitation on time consumption, while the second method is proposed for a time limited case by using a 1st derivative of cost function, which is proportional to error signal from discriminators of conventional tracking methods. The second method can be implemented by a block diagram approach for tracking carrier phase, Doppler frequency and code phase with assuming no correlation of signal parameters. Finally, a state space form of FLL/PLL/DLL is adopted to the designed MLE based tracking algorithm for reducing noise on the estimated signal parameters.

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Analysis of Anti-Jamming Techniques for Satellite Navigation Systems (위성항법시스템을 위한 항재밍 기술 분석)

  • Kim, Ki-Yun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38C no.12
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    • pp.1216-1227
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    • 2013
  • GNSS(Global Navigation Satellite System) is now being widely used in both civilian and military applications where accurate positioning and timing information are required and it is considered as a representative convergence technique in IT-Military application techniques. However, GNSS has low sensitivity level of GNSS receivers and is vulnerable to jamming signal, since the signals come from the satellite located at approximately 20,000 Km above the earth. The studies for the anti-jamming techniques in military applications have been passively performed in the domestic, because the information related GNSS are dependent on the countries that have GNSS. In this paper, we show the effect of jammer ERP by analyzing the link budget of GPS J/S power as a function of distance between jammer and receiver. Also, we categorize the anti-jamming techniques based on the functional block diagram of GNSS receiver structure and analyze the recent anti-jamming GNSS products and their technologies developed in domestic and foreign countries.