• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.6
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• pp.873-879
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• 2016

A charge pump circuit with very short turn-on time is presented for minimizing reference spurs in CMOS PLL frequency synthesizers. In the source switching charge pump circuit, applying proper voltages to the source nodes of the current source FETs can significantly reduce the unwanted glitch at the output current while not degrading the rising time, thus resulting in low spur at the synthesizer output spectrum. A 1.1-1.6 GHz PLL synthesizer employing the proposed charge pump circuit is fabricated in 65 nm CMOS. The current consumption of the charge pump is $490{\mu}A$ from 1 V supply. Compared to the conventional charge pump, it is shown that the reference spur is improved by dB through minimizing the turn-on time. Theoretical analysis is described to show that the measured results agree well with the theory.

• Journal of the Microelectronics and Packaging Society
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• v.9 no.1
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• pp.15-20
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• 2002

In this project, we hale developed various techniques for subminiaturization, surface implementation, high frequency design, small-size SMD, performance test and application of the Dual PLL module, which is a core component for the personal communication systems. We also obtained base techniques for the next-generation Dual PLL module design and fabrication techniques for an internationally competitive subminiature Dual PLL module.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.1053-1056
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• 2005

This paper proposes a design technique of DDS (Direct Digital Synthesizer) to reduce the ROM size, and also describes the procedure of the implementation of the technique. Unlike other techniques suggested so far, the proposed technique is able to reduce the ROM size to a great extent with minimal hardware overheads. The frequencies of the signal synthesized by the implemented DDS accurately changed with the applied frequency control words.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1998.05a
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• pp.258-264
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• 1998

본문에서 주파수hopping과 이동통신에서 요구되는 고속 주파수 전환이 가능한 새로운 주파수 신시사이저 (Synthesizer)를 제안한다. 종래의 PLL 주파수 신시사이저는 기준 주파수와 출력의 채널 주파수 간격이 동일하기 때문에 기준 주파수를 낮게 하면 매우 긴 동기 시간이 소요된다. 본 논문에서 제안하는 주파수 신시사이저는 새로운 제어 방법을 이용한 다단 펄스 제거 회로를 사용하여 기준 주파수와 채널 간격 주파수를 독립적으로 설정할 수 있기 때문에 종래의 신시사이저와 동일한 채널 간격의 주파수를 유지시키면서 기준 주파수를 높일 수 있고, 또한 루프(loop)이득을 크게 할 수 있다. 따라서 종래의 주파수 신시사이저보다 주파수 절환시간을 크게 단축할 수 있다. 본 논문에서는 주파수 절환시간을 1/100 정도 단축시킬 수 있음을 보여주고 있다.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1988.10a
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• pp.101-108
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• 1988

In this paper packet-swap Accptant Queveing system with synchronous single server and finite storage space is proposed for throughput improvement. Queueling systems are analyzed with Minisint Approximation reported by J.F CHANG and R.F Chang. Comparison between PSA. Queveing system and First-Come First Acceptant Queveing system via throughput and blocking probabilliy of test octet was performed The comparison showed that PAS Queweing system perfumes better than j.F ChANG’s Queveing system.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.267-270
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• 1999

In this paper, a new method to reduce the size of ROM in the direct digital frequency synthesizer (DDFS) is proposed. In the case that ROM is used for sinusoidal value calculation, reducing the size of ROM is significant. So the power consumption is affected mostly by its bit width. In the proposed method, the ROM bit width is reduced by 1 bit using the phase subtraction and the approximation. The spurious level is better than 80㏈c and the power consumption estimated is 510㎼/MHz.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.785-787
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• 2005

In the Bluetooth specification version 1.0, one specific frequency in one piconet was created depending upon the device clock and the Bluetooth native address at one specific time slot in the frequency hopping method. The basic hopping pattern was arranging the 79 ISM frequency band in pseudo-random fashion. Possible problem is the chance of collision of ownership of one specific frequency by more than 2 wireless devices when they are within the communication-active range. In this paper, we propose the adaptive frequency hopping method in order to resolve the possible problem so that more than 2 wireless devices communicates with their own client devices without being interfered. The proposed method was implemented with HDL later to be synthesized with an automatic EDA synthesizer and verified as well. The implemented adaptive frequency hopping circuit operated normally at 24MHz which will be the target clock frequency of the target Bluetooth device.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.2
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• pp.208-217
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• 2010

This paper presents a novel 10 GHz bio-radar system based on a frequency multiplier and phase-locked loop(PLL) for non-contact measurement of heartbeat and respiration rates. In this paper, a 2.5 GHz voltage controlled oscillator (VCO) with PLL is employed to as a frequency synthesizer, and 10 GHz continuous wave(CW) signal is generated by using frequency multiplier from 2.5 GHz signal. This paper also presents the noise characteristic of the proposed system. As a result, a better performance and economical frequency synthesizer can be achieved with the proposed bio-radar system. The experimental results shows excellent bio-signal measurement up to 100 cm without any additional digital signal processing(DSP), and the proposed system is validated.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.6
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• pp.661-670
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• 2013

In this paper, we propose the measurement techniques of mixed waveform. Mixed waveform has phase-continuous periodic waveform with fixed frequency signal and Linear Frequency Modulation(LFM) signal. This waveform is generated from a compact radar transmitter with frequency synthesizer and high power amplifier. Frequency synthesizer generates various signal waveform with continuos phase and high power amplifier amplify transmitting signal. First, we describe a compact radar transmitter with the phase-continuos signal and then verify the distortion characteristic of pulse compression by the mismatch of LFM waveform. Second, we describe three kinds of measurement techniques for measuring LFM waveform. These techniques include methods using signal analyzer, signal source analyzer and new methods using RF mixer and phase shifter. Finally, we verify the accuracy of the measurement technique from the pulse compression result of receiving signal.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.5
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• pp.1038-1044
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• 2011

In this paper, the multichannel intermediate frequency transceiver for broadband multimedia system is designed and the experimental results are analyzed. Basic elements of the transceiver such as frequency synthesizer, amplifier, mixer, automatic gain control amplifier are introduced. The analysis technique described here applies not only to amplifier but also to any other nonlinear components such as mixers and frequency doubler. Through the investigation of the power spectrum density of the transmitted signal, the phase noise of the local oscillator is evaluated below 70 dBc/kHz. The frequency characteristics of the modulated signal is flat within the system bandwidth. Also the effects of adjacent channel interference and supurious emission are analyzed. And the function of automatic gain control amplifier is well operated.