• Journal of Korea Society of Digital Industry and Information Management
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• v.10 no.4
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• pp.117-125
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• 2014

In this paper, a novel hardware architecture of the LT codec is presented where non-BP based decoding algorithm is applied. Novel LT codec architecture is designed with an efficient degree distribution unit using Verilog HDL. To perform permutation operation, different initial valued or time shifted counters have been used to get pretty well permutations and an effect of randomness. The codec will take 128 bits as input and produce 256 encoded output bits. The simulation results show expected performances as the implemented distribution and the original distribution are pretty same. The proposed LT codec takes 257.5 cycle counts and $2.575{\mu}s$ for encoding and decoding instead of 5,204,861 minimum cycle counts and 4.43s of the design mentioned in the previous works where iterative soft BP decoding was used in ASIC and ASIP implementation of the LT codec.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39B no.11
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• pp.723-729
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• 2014

In this paper, we derive the average repair bandwidth and/or read cost for arbitrary repairable linear code ensembles. The repair bandwidth and read cost are the required amount of data and access number of nodes to restore a failed node, respectively. Here, the repairable linear code ensemble is given by such parameters as the number k of data symbols, the number m of parity symbols, and their degree distributions. We further assume that the code is systematic, and no other constraint is assumed, except possibly that the exact repair could be done by the parity check-sum relation with fully connected n=k+m storages. This enables one to apply the result of this paper directly to any randomly constructed codes with the above parameters, such as linear fountain codes. The final expression of the average repair read cost shows that it is highly dependent on the degree distribution of parity symbols, and also the values n and k.