• 제목/요약/키워드: Field Effect Mobility

검색결과 517건 처리시간 0.034초

박막트랜지스터 응용을 위한 고온 결정화된 다결정실리콘의 특성평가 (The Characteristics of High Temperature Crystallized Poly-Si for Thin Film Transistor Application)

  • 김도영;심명석;서창기;이준신
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제53권5호
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    • pp.237-241
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    • 2004
  • Amorphous silicon (a-Si) films are used in a broad range of solar cell, flat panel display, and sensor. Because of the greater ease of deposition and lower processing temperature, thin films are widely used for thin film transistors (TFTs). However, they have lower stability under the exposure of visible light and because of their low field effect mobility ($\mu$$_{FE}$ ) , less than 1 c $m^2$/Vs, they require a driving IC in the external circuits. On the other hand, polycrystalline silicon (poly-Si) thin films have superiority in $\mu$$_{FE}$ and optical stability in comparison to a-Si film. Many researches have been done to obtain high performance poly-Si because conventional methods such as excimer laser annealing, solid phase crystallization and metal induced crystallization have several difficulties to crystallize. In this paper, a new crystallization process using a molybdenum substrate has been proposed. As we use a flexible substrate, high temperature treatment and roll-to-roll process are possible. We have used a high temperature process above 75$0^{\circ}C$ to obtain poly-Si films on molybdenum substrates by a rapid thermal annealing (RTA) of the amorphous silicon (a-Si) layers. The properties of high temperature crystallized poly-Si studied, and poly-Si has been used for the fabrication of TFT. By this method, we are able to achieve high crystal volume fraction as well as high field effect mobility.

금속기판에서 재결정화된 규소 박막 트랜지스터 (Recrystallized poly-Si TFTs on metal substrate)

  • 이준신
    • E2M - 전기 전자와 첨단 소재
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    • 제9권1호
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    • pp.30-37
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    • 1996
  • Previously, crystallization of a-Si:H films on glass substrates were limited to anneal temperature below 600.deg. C, over 10 hours to avoid glass shrinkage. Our study indicates that the crystallization is strongly influenced by anneal temperature and weakly affected by anneal duration time. Because of the high temperature process and nonconducting substrate requirements for poly-Si TFTs, the employed substrates were limited to quartz, sapphire, and oxidized Si wafer. We report on poly-Si TFT's using high temperature anneal on a Si:H/Mo structures. The metal Mo substrate was stable enough to allow 1000.deg. C anneal. A novel TFT fabrication was achieved by using part of the Mo substrate as drain and source ohmic contact electrode. The as-grown a-Si:H TFT was compared to anneal treated poly-Si TFT'S. Defect induced trap states of TFT's were examined using the thermally stimulated current (TSC) method. In some case, the poly-Si grain boundaries were passivated by hydrogen. A-SI:H and poly-Si TFT characteristics were investigated using an inverted staggered type TFT. The poly -Si films were achieved by various anneal techniques; isothermal, RTA, and excimer laser anneal. The TFT on as grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. Some films were annealed at temperatures from 200 to >$1000^{\circ}C$ The TFT on poly-Si showed an improved $I_on$$I_off$ ratio of $10_6$, reduced gate threshold voltage, and increased field effect mobility by three orders. Inverter operation was examined to verify logic circuit application using the poly Si TFTs.

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Flexible Display용 Low Temp Process를 이용한 ZnO TFT의 제작 및 특성 평가 (Fabrication and Characteristics of ZnO TFTs for Flexible Display using Low Temp Process)

  • 김영수;강민호;남동호;최광일;이희덕;이가원
    • 한국전기전자재료학회논문지
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    • 제22권10호
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    • pp.821-825
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    • 2009
  • Recently, transparent ZnO-based TFTs have attracted much attention for flexible displays because they can be fabricated on plastic substrates at low temperature. We report the fabrication and characteristics of ZnO TFTs having different channel thicknesses deposited at low temperature. The ZnO films were deposited as active channel layer on $Si_3N_4/Ti/SiO_2/p-Si$ substrates by RF magnetron sputtering at $100^{\circ}C$ without additional annealing. Also, the ZnO thin films deposited at oxygen partial pressures of 40%. ZnO TFTs using a bottom-gate configuration were investigated. The $Si_3N_4$ film was deposited as gate insulator by PE-CVD at $150^{\circ}C$. All Processes were processed below $150^{\circ}C$ which is optimal temperature for flexible display and were used dry etching method. The fabricated devices have different threshold slop, field effect mobility and subthreshold slop according to channel thickness. This characteristics are related with ZnO crystal properties analyzed with XRD and SPM. Electrical characteristics of 60 nm ZnO TFT (W/L = $20\;{\mu}m/20\;{\mu}m$) exhibited a field-effect mobility of $0.26\;cm^2/Vs$, a threshold voltage of 8.3 V, a subthreshold slop of 2.2 V/decade, and a $I_{ON/OFF}$ ratio of $7.5\times10^2$.

미세접촉프린팅 공정을 이용한 유연성 유기박막소자(OTFT)설계 및 제작 (Design and Fabrication of Flexible OTFTs by using Nanocantact Printing Process)

  • 조정대;김광영;이응숙;최병오
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2005년도 추계학술대회 논문집
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    • pp.506-508
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    • 2005
  • In general, organic TFTs are comprised of four components: gate electrode, gate dielectric, organic active semiconductor layer, and source and drain contacts. The TFT current, in turn, is typically determined by channel length and width, carrier field effect mobility, gate dielectric thickness and permittivity, contact resistance, and biasing conditions. More recently, a number of techniques and processes have been introduced to the fabrication of OTFT circuits and displays that aim specifically at reduced fabrication cost. These include microcontact printing for the patterning of metals and dielectrics, the use of photochemically patterned insulating and conducting films, and inkjet printing for the selective deposition of contacts and interconnect pattern. In the fabrication of organic TFTs, microcontact printing has been used to pattern gate electrodes, gate dielectrics, and source and drain contacts with sufficient yield to allow the fabrication of transistors. We were fabricated a pentacene OTFTs on flexible PEN film. Au/Cr was used for the gate electrode, parylene-c was deposited as the gate dielectric, and Au/Cr was chosen for the source and drain contacts; were all deposited by ion-beam sputtering and patterned by microcontact printing and lift-off process. Prior to the deposition of the organic active layer, the gate dielectric surface was treated with octadecyltrichlorosilane(OTS) from the vapor phase. To complete the device, pentacene was deposited by thermal evaporation and patterned using a parylene-c layer. The device was shown that the carrier field effect mobility, the threshold voltage, the subthreshold slope, and the on/off current ratio were improved.

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Al2O3 층을 이용한 저온공정에서의 산화물 기반 트랜지스터 컨택 특성 향상 (Improved Contact property in low temperature process via Ultrathin Al2O3 layer)

  • 정성현;신대영;조형균
    • 한국표면공학회:학술대회논문집
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    • 한국표면공학회 2018년도 춘계학술대회 논문집
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    • pp.55-55
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    • 2018
  • Recently, amorphous oxides such as InGaZnO (IGZO) and InZnO (IZO) as a channel layer of an oxide TFT have been attracted by advantages such as high mobility, good uniformity, and high transparency. In order to apply such an amorphous oxide TFTs to a display, the stability in various environments must be ensured. In the InGaZnO which has been studied in the past, Ga elements act as a suppressor of oxygen vacancy and result in a decreased mobility at the same time. Previous studies have been showed that the InZnO, which does not contain Ga, can achieve high mobility, but has relatively poor stability under various instability environments. In this study, the TFTs using $IZO/Al_2O_3$ double layer structure were studied. The introduction of an $Al_2O_3$ interlayer between source/drain and channel causes superior electrical characteristics and electrical stability as well as reduced contact resistance with optimally perfect ohmic contact. For the IZO and $Al_2O_3$ bilayer structures, the IZO 30nm IZO channels were prepared at $Ar:O_2=30:1$ by sputtering and the $Al_2O_3$ interlayer were depostied with various thickness by ALD at $150^{\circ}C$. The optimal sample exhibits considerably good TFT performance with $V_{th}$ of -3.3V and field effect mobility of $19.25cm^2/Vs$, and reduced $V_{th}$ shift under positive bias stress stability, compared to conventional IZO TFT. The enhanced TFT performances are closely related to the nice ohmic contact properties coming from the defect passivation of the IZO surface inducing charge traps, and we will provide the detail mechanism and model via electrical analysis and transmission line method.

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폴리이미드 패시베이션과 폴리비닐알콜 패시베이션 레이어 성막이 고성능 유기박막 트렌지스터에 주는 영향 (Effects of Polyimide Passivation Layers and polyvinylalcohol Passivation Layers for Organic Thin-Film Transistors(OTFTs))

  • 박일흥;형건우;최학범;황선욱;김영관
    • 한국진공학회지
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    • 제17권3호
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    • pp.195-198
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    • 2008
  • 이 논문에서 무기 게이트 인슐레이터 위에 Polyimide 유기 점착층을 성형하여, 고성능의 유기 박막 트렌지스터(OTFT)소자를 제작한 후 450 nm 두께로 폴리이미드를 Vapor deposition polymerization (VDP)방법을 사용하여 패시베이션하였다. 이때 폴리이미드성막을 위해, 스핀코팅 방법 대신 VDP 방법 도입하였다. 이 폴리이미드 고분자막은 2,2 bis(3,4-dicarboxyphenyl) hexafluoropropane dianhydride (6FDA)와 4,4‘-oxydianiline(ODA)을 고진공에서 동시에 열증착 시킨 후, $170^{\circ}C$에서 2시간 열처리하여 고분자화 된 막을 형성하였다. 다른 종류의 유기 패시베이션 막이 소자에 주는 영향을 비교 분석하기 위해, 450 nm 두께로 스핀코팅법을 이용하여 폴리비닐알콜 패시베이션 막을 형성하였다. 이 두 가지 패시베이션 막 형성법이 소자의 문턱전압과, 전하이동도에 주는 영향을 전기적 특성을 통해 변화를 확실히 볼 수 있었다. 최초 유기 박막 트렌지스터의 전기적 특성은 문턱전압, 점멸비, 그리고 정공의 이동도는 각각, -3 V, 약 $10^6$ 그리고, $0.24cm^2$/Vs 이 측정되었고. 폴리이미드를 사용하여 패시베이션 후 특성이 각각 0 V, 약 $10^6$ 그리고, $0.26cm^2/Vs$, 폴리비닐알콜 패시베이션 경우는 특성이 각각, 문턱전압의 경우 0 V에서 +2 V로, 점멸비는 $10^6$에서 $10^5$으로 전계효과이동도는 $0.13cm^2/Vs$ 에서 $0.13cm^2/Vs$로 변화하였다.

현장실증시험을 통한 중금속 오염농경지의 안정화처리공법 효과비교 (A Comparison on Effect of Stabilization Methods for Heavy Metal contaminated Farm Land Soil by the Field Demonstration Experiment)

  • 유찬;윤성욱;이정훈;최승진;최덕용;이지민
    • 한국지반공학회:학술대회논문집
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    • 한국지반공학회 2009년도 세계 도시지반공학 심포지엄
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    • pp.1487-1506
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    • 2009
  • A long-term field experiment of the selected stabilization methods(Cover system, full range and upper range treatment) was conducted to reduce the heavy metal mobility in farmland soil which was contaminated by heavy metals around abandoned mine site. Field experiments were established on the contaminated farmland with the wooden plate and filled with treated soil, which was mixed with lime stone and steel reforming slag except on control plot. Soil samples were collected and analyzed during the experiment period(about 4 months) after the installation of the plots. Field demonstration experiments results showed that the cover system and the full range treatment of the selected stabilization methods applied to the application ratio of lime stone 5% and steel refining slag 2% were effective for immobilizing heavy metal components in contaminated farmland soil.

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The Effect of Transverse Magnetic field on Macrosegregation in vertical Bridgman Crystal Growth of Te doped InSb

  • Lee, Geun-Hee;Lee, Zin-Hyoung
    • 한국결정성장학회:학술대회논문집
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    • 한국결정성장학회 1996년도 The 9th KACG Technical Annual Meeting and the 3rd Korea-Japan EMGS (Electronic Materials Growth Symposium)
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    • pp.522-522
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    • 1996
  • An investigation of the effects of transverse magnetic field and Peltier effect on melt convection and macrosegregation in vertical Bridgman crystal grosth of Te doped InSb was been carried out by means of microstructure observation, Hall measurement, electrical resistivity measurement and X-ray analysis. Before the experiments, Interface stability, convective instability and suppression of convection by magnetic field were calculated theoretically. After doping 1018, 1019 cm-3 Te in InSb, the temperature of Bridgman furnace was set up at $650^{\circ}C$. The samples were grown in I.D. 11mm, 100mm high quartz tube. The velocity of growth was about 2${\mu}{\textrm}{m}$/sec. In order to obtain the suppression of convection by magnetic field in the middle of growth, 2-4KG magnetic field was set on the melt. For searching of the shape of solid-liquid interface and the actual velocity of crystal growth, let 2A current flow from solid to liquid for 1second every 50seconds repeatedly (Peltier effect). The grown InSb was polycrystal, and each grain was very sharp. There was no much difference between the sample with and without magnetic field at a point of view of microstructure. For the sample with Peltier effect, the Peltier marks(striation) were observed regularly as expected. Through these marks, it was found that the solid-liquid interface was flat and the actual growth velocity was about 1-2${\mu}{\textrm}{m}$/sec. On the ground of theoretical calculation, there is thermosolutal convection in the Te doped InSb melt without magnetic field in this growth condition. and if there is more than 1KG magnetic field, the convection is suppressed. Through this experiments, the effective distribution coefficients, koff, were 0.35 in the case of no magnetic field, and 0.45 when the magnetic field is 2KG, 0.7 at 4KG. It was found that the more magnetic field was applied, the more convection was suppressed. But there was some difference between the theoretical calculation and the experiment, the cause of the difference was thought due to the use of some approximated values in theoretical calculation. In addition to these results, the sample with Peltier effect showed unexpected result about the Te distribution in InSb. It looked like no convection and no macrosegregation. It was thought that the unexpected behavior was due to Peltier mark. that is, when the strong current flew the growing sample, the mark was formed by catching Te. As a result of the phenomena, the more Te containing thin layer was made. The layer ruled the Hall measurement. The values of resistivity and mobility of these samples were just a little than those of other reference. It was thought that the reason of this result was that these samples were due to polycrystal, that is, grain boundaries had an influence on this result.

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Effects of metal contacts and doping for high-performance field-effect transistor based on tungsten diselenide (WSe2)

  • Jo, Seo-Hyeon;Park, Jin-Hong
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.294.1-294.1
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    • 2016
  • Transition metal dichalcogenides (TMDs) with two-dimensional layered structure, such as molybdenum disulfide (MoS2) and tungsten diselenide (WSe2), are considered attractive materials for future semiconductor devices due to its relatively superior electrical, optical, and mechanical properties. Their excellent scalability down to a monolayer based on the van der Waals layered structure without surface dangling bonds makes semiconductor devices based on TMD free from short channel effect. In comparison to the widely studied transistor based on MoS2, researchs focusing on WSe2 transistor are still limited. WSe2 is more resistant to oxidation in humid ambient condition and relatively air-stable than sulphides such as MoS2. These properties of WSe2 provide potential to fabricate high-performance filed-effect transistor if outstanding electronic characteristics can be achieved by suitable metal contacts and doping phenomenon. Here, we demonstrate the effect of two different metal contacts (titanium and platinum) in field-effect transistor based on WSe2, which regulate electronic characteristics of device by controlling the effective barreier height of the metal-semiconductor junction. Electronic properties of WSe2 transistor were systematically investigated through monitoring of threshold voltage shift, carrier concentration difference, on-current ratio, and field-effect mobility ratio with two different metal contacts. Additionally, performance of transistor based on WSe2 is further enhanced through reliable and controllable n-type doping method of WSe2 by triphenylphosphine (PPh3), which activates the doping phenomenon by thermal annealing process and adjust the doping level by controlling the doping concentration of PPh3. The doping level is controlled in the non-degenerate regime, where performance parameters of PPh3 doped WSe2 transistor can be optimized.

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게이트 절연막에 의한 다이아몬드 MIS (Metal-Insulator-Semiconductor) 계면의 전기적 특성 개선과 전계효과 트랜지스터에의 응용 (Improvement of Electrical Properties of Diamond MIS (Metal-Insulator- Semiconductor) Interface by Gate Insulator and Application to Metal-Insulator- Semiconductor Field Effect Transistors)

  • 윤영
    • 한국전자파학회논문지
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    • 제14권6호
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    • pp.648-654
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    • 2003
  • 본 논문에서는 비 산화물인 불소화합물 게이트절면막을 이용하여 박막반도체 다이아몬드 MS계면(Metal-Insulator-Semiconductor Interface)의 전기적 안정화를 실현하였다. 특히 산소 게터링 효과(Oxygen-Gettering Effect)에 의한 표면준위 억제를 통해, 박막반도체 다이아몬드 MIS계면에 있어서 최적의 전기적 특성을 부여하는 BiF2 게이트절연막을 개발하였다. 본 논문의 결과에 의하면, BaF$_2$ 게이트 절연막을 이용하여 제작한 A1/BaF2/diamond MIS 다이오드와 MISFET(Metal-Insulator-Semiconductor Field Effect Transistor)로부터 저농도의 ~10101/$\textrm{cm}^2$ eV의 표면준위밀도가 관측되었고, 그리고 이제까지 발표된 다이아몬드 박막반도_체 FET중 최고치인 400 $\textrm{cm}^2$/Vs의 유효이동도가 관찰되었다.