• 전기학회논문지P
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• 제53권4호
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• pp.210-215
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• 2004

This paper proposes an implicit method for computing the minimum cost feedback vertex set for a graph. For an arbitrary graph, a Boolean function is derived, whose satisfying assignments directly correspond to feedback vertex sets of the graph. Importantly, cycles in the graph are never explicitly enumerated, but rather, are captured implicitly in this Boolean function. This function is then used to determine the minimum cost feedback vertex set. Even though computing the minimum cost satisfying assignment for a Boolean function remains an NP-hard problem, it is possible to exploit the advances made in the area of Boolean function representation in logic synthesis to tackle this problem efficiently in practice for even reasonably large sized graphs. The algorithm has obvious application in flip-flop selection for partial scan. The algorithm proposed in this paper is the first to obtain the MFVS solutions for many benchmark circuits.

• 전자공학회논문지B
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• 제32B권1호
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• pp.11-20
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• 1995

A new graph problem is formulated to limit the maximum path length of a general directed graph when a minimal set of vertices together with their incident edges are removed from the graph. An optimal algorithm and a heuristic algorithm are proposed and the proposed heuristic algorithm is shown to be effective through experiments using a collection of graphs obtained from large sequential circuits. The heuristic algorithm is based on a feedback vertex set algorithm based on graph reduction.