• 전기학회논문지P
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• 제64권4호
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• pp.291-296
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• 2015

Transmission line is exposed to a large area, and then faults are likely to occur than the other component of power system. When a fault occurs on a transmission line, fault locator helps fast recovery of power supply on power system. This paper deals with the design of a digital fault locator for improvement accuracy of the fault distance estimation and a fault occurrence position for transmission line. The algorithm of a fault locator uses a DC offset removal filter and DFT filter. The algorithm utilizes a fault data of GPS time synchronized. The computed fault information is transmitted to the other side substation through communication. The digital fault locator includes MPU module, ADPU module, SIU module, and a power module. The MMI firmware and software of the fault locator was implemented.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.275-277
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• 2004

when a fault occurs, we need the fault locator to find out the location of the fault quickly. The fault locator can find out the exact location of the fault through the line constants of the catenary system. If the configuration of the catenary system is modified, the line constants is also changed. Therefore, this paper analyzes the error of the operation of the fault locator by the simulation.

• 전기학회논문지P
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• 제65권1호
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• pp.47-52
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• 2016

Fault location identification in the transmission line is an essential part of quick service restoration for maintaining a stable in power system. The application of digital schemes to protection IEDs has led to the development of digital fault locators. Normally, the impedance measurement had been used to for the location detection of transmission line faults. It is well known that the most accurate fault location scheme uses two-ended measurements. This paper deals with the complete design of a fault locator using GPS time-synchronized phasor for transmission line fault detection. The fault location algorithm uses the transmitted relaying signals from the two-ended terminal. The fault locator hardware consists of a Main Processor Unit, Analog Digital Processor Unit, Signal Interface Unit, and Power module. In this paper, sample real-time test cases using COMTRADE format of Omicron apparatus are included. We can see that the implemented fault locator identified all the test faults.

• 전기학회논문지
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• 제65권3호
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• pp.504-510
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• 2016

In general, a fault locator is installed in Sub-Station of AT(Auto-transformer) feeding system to estimate the fault location and to protect the Korean AT feeding system. Since the line impedance characteristic is different to normal 3-phase transmission line, we need particular modification factors, which can be calculated using fault location recording data, to estimate the accurate fault location. Up to recently, forcible ground test has been used to calculate the modification factors of the fault locator. However, large amount of current is occurred when the forcible ground test is performed, and this current affects to adjacent equipments. Therefore, we proposed a novel calculation method of modification factors, arbitrary trip test, using boosting current of the operating electric train. Through several field test, we confirmed that modification factors for fault locator can be easily calculated by using proposed method. Moreover, we verified the accuracy and stability of the proposed calculation method.

• 조명전기설비학회논문지
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• 제30권3호
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• pp.46-52
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• 2016

When a fault occurs on a transmission line, it is important to identify the fault location as speedily as possible for improvement of the power supply reliability. Generally, distance to fault location is estimated by off line from the recorded data. Conventional fault recorder uses the fault data at one end. This paper deals with the design of an advanced fault recorder for enhancement accuracy of the fault distance estimation and fast detection a fault occurrence position. The major emphasis of the paper will be on the description of the hardware and software of the fault recorder. The fault locator algorithm utilizes a GPS time-synchronized the fault data at both ends. The fault data is transmitted to the other side substation through communication. The advanced fault locator includes a Power module, MPU(Main Processing Unit) module, ADPU(Analog Digital Processing Unit) module, and SIU(Signal Interface Unit) modules. The MMI firmware and software of an advanced fault recording device was implemented.

• 한국산학기술학회논문지
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• 제16권12호
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• pp.8927-8932
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• 2015

전기철도에 전력을 공급하기 위하여 철도변전소에서는 급전특성상 방면별 급전을 시행하고 있으며, 급전계통에 고장이 발생하는 경우를 대비한 공통반 차단기와 같은 예비설비와 전차선로 고장 발생 시 고장위치를 찾기 위해 고장점 표정장치를 설치하여 사용 중에 있다. 그러나, 고장 발생 시 공통반 차단기를 사용하여 급전계통을 운용하는 경우에는 고장점 표정반과의 인터페이스가 되지 않아 고장위치를 찾는데 어려움이 있다. 본 논문은 이러한 문제점을 해결하기 위한 고장점 표정반 자동절체 시스템을 설계하고 동작 상태를 검증한다. 또한 자동절체 시스템을 공통반 차단기에 설치한 후 검증방법으로 설정된 24회의 지락시험을 통하여 성능시험을 수행하였으며 고장점 표정장치를 이용하여 기존의 고장위치를 효율적으로 검지하는 방법을 제시하는 데 있다.

• 한국철도학회논문집
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• 제20권5호
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• pp.595-601
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• 2017

전철화 확대의 영향으로 전차선로 변의 고장발생 빈도는 지속적으로 증가하여, 고장위치를 표정하는 시스템의 중요도는 향상되고 있다. 그럼에도 전차선로의 정확한 고장위치 표정은 매우 어려운 현실이다. 본 논문에서는 기존 회로방정식으로 제안된 전차선로 임피던스 계산이론에 대해 현장실측 데이터를 활용하여 보편화 정리하고 변전소 및 운행차량의 전압, 전류 데이터를 동기화 실측하여 전차선로의 임피던스를 예측 하였다. 또한 예측된 전차선로 임피던스값의 유효성 확인을 위해 동일지점에서 열차전류에 따른 임피던스 변화 정도를 시뮬레이션으로 확인하였다. 끝으로 측정 데이터와 지락시험을 통한 데이터를 비교 분석하였다. 본 기법은 강제지락시험, 인공지락시험을 통해 임피던스를 예측하는 현행 방식 대비 열차운행 중단 없이 다수의 데이터를 확보할 수 있고 시간경과에 따른 임피던스 변화에 대해서도 신속하고 편리하게 대응할 수 있는 장점이 있는 것으로 판단된다.

• 한국철도학회:학술대회논문집
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• 한국철도학회 1998년도 추계학술대회 논문집
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• pp.262-269
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• 1998

In case the fault occurs in AC power supply network, protective relaying system must selectively detect line-to-line/ground fault and immediately cut off the power flow into the fault location for guaranteeing the safety of people, electric vehicle and ground installation etc. It is the most important point in power system operation to minimize the fault duration by rapid trip scheme and accurate estimation of the fault location. In this paper, we analyze the load characteristics of each vehicle, perform the fault analysis of AC power supply network using AT current-ratio method. The result shows its usefulness.

• 전기학회논문지
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• 제57권9호
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• pp.1522-1530
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• 2008

This paper presents a discrete wavelet analysis based algorithm to address the fault impedance calculation under transient state in radial power distribution networks. The fault impedances have been derived under different fault conditions. Furthermore, a recursive fault distance estimation method is proposed utilizing the measured fault impedance and power line parameters. The proposed scheme can resolve the errors caused by the non-homogeneous power lines, the presence of lateral loads since, the fault impedance will always be updated with the recursive form. For the verification of the proposed scheme, a filed test has been peformed with varying fault resistances in the 22.9(kV) radial system. Power meters and fault locators were installed at the substation. It was figured out that the performance of the discrete wavelet and the recursive scheme are very good even for high fault resistance condition.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2009년도 제40회 하계학술대회
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• pp.74_76
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• 2009

This paper presents a discrete wavelet analysis based algorithm to address the fault impedance calculation under transient state in radial power distribution networks. The fault impedances have been derived under different fault conditions. Furthermore, a recursive fault distance estimation method is proposed utilizing the measured fault impedance and power line parameters. The proposed scheme can resolve the errors caused by the non-homogeneous power lines, the presence of lateral loads since, the fault impedance will always be updated with the recursive form. For the verification of the proposed scheme, a filed test has been peformed with varying fault resistances in the 22.9(kV) radial system. Power meters and fault locators were installed at the substation. It was figured out that the performance of the discrete wavelet and the recursive scheme are very good even for high fault resistance condition.