• Journal of Electrical Engineering and Technology
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• v.9 no.6
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• pp.1789-1794
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• 2014

This paper suggests an application method for a superconducting fault current limiter (SFCL) using an evaluation index to estimate the risk regarding the short-circuit capacity of the circuit breaker (CB). Recently, power distribution systems have become more complex to ensure that supply continuously keeps pace with the growth of demand. However, the mesh or loop network power systems suffer from a problem in which the fault current exceeds the short-circuit capacity of the CBs when a fault occurs. Most case studies on the application of the SFCL have focused on its development and performance in limiting fault current. In this study, an analysis of the application method of an SFCL considering the risk of the CB's short-circuit capacitor was carried out in situations when a fault occurs in a loop network power system, where each line connected with the fault point carries a different current that is above or below the short-circuit capacitor of the CB. A loop network power system using PSCAD/EMTDC was modeled to investigate the risk ratio of the CB and the effect of the SFCL on the reduction of fault current through various case studies. Through the risk evaluations of the simulation results, the estimation of the risk ratio is adequate to apply the SFCL and demonstrate the fault current limiting effect.

• Progress in Superconductivity and Cryogenics
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• v.10 no.1
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• pp.42-47
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• 2008

In this paper, the fault current limiting characteristics for the superconducting fault current limiter(SFCL) using magnetic coupling between two coils were investigated. The SFCL consists of a high-$T_c$ superconducting(HTSC) element and two coils. This SFCL has different characteristics that depend on the connection form, the winding direction and the inductance ratio of two coils. The impedance and the operational current of the SFCL can be adjusted higher or lower than the resistance and the critical current of HTSC element. Therefore, the SFCL can change the amplitude of the limited fault current. To confirm it, the HTSC element was modeled and the fault current limiting characteristics of the SFCL were analysed through computer simulation. It was obtained from the analysis that the connection form and the winding direction of two coils of the SFCL were the important design parameters.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.10
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• pp.1554-1560
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• 2012

In this paper, the even harmonic current(2nd, 4th, 6th, 8th) of the arc fault current and normal current were measured in computer load and analyzed. The BPF with GIC was developed to detection of harmonic, the exact center frequency and a high degree of sharpness could be easily obtained. The total even harmonic distortion due to series arc fault in computer load was 31.2%, this value was increased 3.9 times better than the total even harmonic distortion of normal current. The results of analysis of arc fault current RMS variation rate and Peak variation rate per half-cycle, The RMS average variation rate are as follows ; the 2nd harmonic was 0.24, the 4th harmonic was 0.15, the 6th harmonic was 0.19, the 8th harmonic was 0.25, respectively. The Peak average variation rate are as follows ; the 2nd harmonic was 0.19, the 4th harmonic was 0.12, the 6th harmonic was 0.13, the 8th harmonic was 0.15, respectively. The results of this analysis utilize data to detect of series arc fault on wiring of computer load.

• Journal of Power Electronics
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• v.16 no.6
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• pp.2258-2271
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• 2016

In this paper, some crucial performance characteristics related to the operational reliability of the post-fault Pulse Width Modulated (PWM) rectifiers, such as line current harmonic distortion, Common Mode Voltage (CMV), and current stress on the capacitors, are fully investigated. The aforementioned performance characteristics of post-fault rectifiers are highly dependent on the utilized space vector modulation (SVM) schemes, which are also examined. Detailed analyses of the three most commonly used SVM schemes for post-fault PWM rectifiers are provided, revealing the major differences in terms of the zero vector synthesis approaches. To compare the performances of the three SVM schemes, the operating principles of a post-fault rectifier are presented with various SVM schemes. Using analytical and numerical methods in the time domain, the performances of the line current distortion, common mode voltage and capacitor current are evaluated and compared for each SVM scheme. The proposed analysis demonstrates that the zero vector synthesis approaches of the considered methods have significant impacts on the performance characteristics of rectifiers. In addition, the advantages and disadvantages of the proposed SVM schemes are discussed. The experimental results verify the effectiveness and validity of the proposed analysis.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.12
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• pp.1000-1003
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• 2012

The superconducting fault current limiter (SFCL) can quickly limit the fault current shortly after the short circuit occurs and recover the superconducting state after the fault removes and plays a role in compensating the voltage sag of the sound feeder adjacent to the fault feeder as well as the fault current limiting operation of the fault feeder. Especially, the flux-lock type SFCL with an isolated transformer, which consists of two parallel connected coils on an iron core and the isolated transformer connected in series with one of two coils, has different voltage sag compensating and current limiting characteristics due to the winding direction and the inductance ratio of two coils. The current limiting and the voltage sag compensating characteristics of a SFCL using a transformer winding were analyzed. Through the analysis on the short-circuit tests results considering the winding direction of two coils, the SFCL designed with the additive polarity winding has shown the higher limited fault current than the SFCL designed with the subtractive polarity winding. It could be confirmed that the higher fault current limitation of the SFCL could be contributed to the higher load voltage sag compensation.

• Transactions on Electrical and Electronic Materials
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• v.18 no.1
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• pp.42-45
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• 2017

In this paper, a transformer type SFCL (superconducting fault current limiter) using an additional magnetically coupled circuit was suggested. Its transient fault current limiting characteristics, due to the winding direction of additional coupled circuit, were analyzed through fault current limiting tests. The suggested transformer type SFCL was composed of the primary winding, and one secondary winding wound on the same iron core together with an additional magnetically coupled circuit. That circuit consists of the other secondary winding together with the other SC (superconducting) element connected in parallel with its other secondary winding. As one of the effective design parameters to affect the transient fault current of the SFCL, the fault current limiting tests of the suggested SFCL were carried out considering the winding direction of its additional coupled circuit. It was confirmed that, through the analysis on the fault current tests of the SFCL, the quench sequence of two SC elements comprising the suggested SFCL could be adjusted by the winding direction of the additional coupled circuit.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.9
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• pp.851-855
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• 2005

We investigated the unbalanced characteristics of the superconducting fault current limiters (SFCLs) based on YBCO thin films with a single line-to-ground fault. When a single line-to-ground fault occurred, the short circuit current of a fault phase increased about 6 times of transport currents after the fault onset but was effectively limited to the designed current level within 2 ms by the resistance development of the SFCL. The fault currents of the sound phases almost did not change because of their direct grounding system. The unbalanced rates of a fault phase were distributed from 6.4 to 1.4. It was found that the unbalanced rates of currents were noticeably improved within one cycle after the fault onset. We calculated the zero phase currents for a single line-to-ground fault using the balanced component analysis. The positive sequence resistance was reduced remarkably right after the fault onset but eventually approached the balanced positive resistance component prior to the system fault. This means that the system reaches almost the three-phase balanced state in about 60 ms after the fault onset at the three-phase system.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.33 no.1
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• pp.65-69
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• 2020

The aim of this study is to improve the fault decision ability of FRTU (Feeder remote terminal unit) in DAS (Distribution automation system). FRTU uses the FI (Fault indicator) algorithm based on fault current pickup and operation of the protection device. Even if the inrush current flows or the protection device is sensitive to the transient current, FRTU may indicate incorrect fault information. To address these problems, we propose an improved fault recognition algorithm that can be applied to FRTU. We will detect a specific wave that is indicative of a fault, and use this information to identify a fault wave. The specific wave-detection algorithm is based on the duration and periodicity of the voltage, current, and harmonic variations. In addition, we propose fault recognition algorithms using voltage factor variation analysis and DWT (Discrete wavelet transform). All the wave data used in this study were actual data stored in FRTU.

• Proceedings of the KIEE Conference
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• 1994.11a
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• pp.114-116
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• 1994

Recently a superconducting fault current limiter(SFCL) has public attentions for the solution of large fault currents of power systems. Though a SFCL has more effective characteristics than the other current limiting devices, there are many problems to apply it to real power systems. For the analysis of transient fault characteristics of the SFCL, we designed and fabricated a inductive SFCL and tested it in 35V line. The superconducting cable of the SFCL was quenched at lower current(49A) than the designed critical current but it limited the fault current to the lower value(150A) than the one expected without SFCL(250A). And within one period the fault current decreased lower than normal laod current.

• Transactions on Electrical and Electronic Materials
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• v.18 no.3
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• pp.159-162
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• 2017

In designing the autotransformer type superconducting fault-current limiter (SFCL), one must consider that the iron core can be saturated for the SFCL to have effective fault-current limiting operation. In this paper, to examine the saturation of the iron core comprising SFCL during the fault period, the linkage flux and the magnetizing current of the SFCL were derived from the electrical equivalent circuit with the nonlinear exciting branch. By analysis on the linkage flux versus the magnetizing current of the autotransformer type SFCL, calculated from the short-circuit tests, the design condition for the suppression of the iron core's saturation was discussed.