• Proceedings of the KIEE Conference
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• 1987.11a
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• pp.534-538
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• 1987

State-space techniques are employed to derive an equivalent nonlinear recurrent time-domain model that describes the series resonant converter behavior exactly. This model is employed effectively to analyze large signal behavior by propagating the recurrent equation and matching boundary conditions through digital computation. The model is verified with a laboratory converter for a steady-state operation.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.35 no.1
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• pp.8-16
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• 1986

For digital process control, a low order discrete time modeling method is suggested and a direct digital control algorithm has been developed. The modeling method maintains process order of 3, while the sampling rate is doubled for fast response. With easy calculation it is possible to compute the model parameters and the controller gains. Controller tuning is possible on the spot. Simulation results show that this method has better performance than the deadbeat control agorithm.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.21 no.6
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• pp.71-76
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• 2021

Recently, as the size of IoT data grows, the memory power consumption of real-time systems increases rapidly. This is because real-time systems always place entire tasks in memory, which increases the demand of DRAM significantly. In this paper, we adopt emerging fast storage media and move a certain portion of real-time tasks from DRAM to storage. The part of tasks in storage are, then, loaded into memory when they are actually used. We incorporate our memory/storage power-saving into the dynamic voltage/frequency scaling of processors, thereby optimizing power consumptions in CPU and memory simultaneously. Specifically, the proposed technique aims at minimizing the CPU idle time and the DRAM memory size by determining appropriate voltage modes of CPU and the swap ratio of memory, without violating the deadlines of all tasks. Through simulation experiments, we show that the proposed technique significantly reduces the power consumption of real-time systems.

• Proceedings of the Korea Society for Simulation Conference
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• 2001.10a
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• pp.269-273
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• 2001

Semiconductor wafer fabrication is a business of high capital investment and fast changing nature. To be competitive, the production in a fab needs to be effectively planned and scheduled starting from the ramping up phase, so that the business goals such as on-time delivery, high output volume and effective use of capital intensive equipment can be achieved. In this paper, we propose Stand Alone layout and In-Line layout are analyzed and compared while varying number of device variable changes. The comparison is performed through simulation using ProSys; a window 98 based discrete system simulation software, as a tool for comparing performance of two proposed layouts. The comparison demonstrates that when the number of device variable change is small, In-Line layout is more efficient in terms of production quantity. However, as the number of device variable change is more than 14 titles, Stand Alone layout prevails over In-Line layout.

• Journal of the Korea Society for Simulation
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• v.5 no.2
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• pp.73-84
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• 1996

As circuits are larger and more complicated, logic simulation is playing a very important role in design verification. A good simulator should be fast and accurate, but unknown values in 3 value simulator may generate X-propagation problem which makes inaccurate output values. In this paper, a new partitioning method is devised to deal with X-propagation problem efficiently and an efficient algorithm is developed which is able to optimize time and accuracy by controlling partition depths. The results prove the effectiveness of the new simulation algorithm using some benchmark circuits.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.5
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• pp.158-169
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• 1994

It is very common in today 's design practice to simulate a big design with a large set of test vectors thereby generating a huge set of data (simulation results) to be analyzed. As the design grows, the simulation results grow and become harder to handled. In this paper, we present algorithms for the compression and regeneration of simulation results. The compression is performed by sampling nets in a circuit. If the user wants to examine the lost part of the data, it is quickly regenerated by applying incremental simulation technique. Experimental results obtained for several practical circuits show that the compression ratio of 10 is easily obtained while maintaining a reasonably fast regeneration of data on a 15.7 MIPS workstation. Using the proposed method we can effectively reduce debug cycle time.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.330-333
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• 2002

The design of high power electronic circuits and the verification of the design by practical experiments are time and cost consuming. Recently power circuit simulation technique is developing to do it easily. However, most of the simulation has used the ideal switch model consists of passive component that can not describe the physical characteristics of semiconductor devices and cannot describe the switching transient state. For the design of such power electronic circuits by the simulation, the switching transients are very important. Therefore the simulation models must describe the switching transient and the stationary behavior as precisely as possible on the hand and as fast as possible the other hand. This paper introduces the application of the physical models of power devices that are developed by TUM(Technical University of Munich, Germany) for the power electronic circuit analysis.

• Journal of the Korea Society for Simulation
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• v.10 no.3
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• pp.83-94
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• 2001

In this paper, the consumable spare parts requirement determination problem of newly procured equipment systems is considered. The problem is formulated as the cost minimization problem with operational availability constraint. Assuming part failure rate is constant during operational period, an analytical method is developed to obtain spare part requirements. Since this solution tends to overestimate the requirements, a fast search simulation procedure is introduced to adjust it to the realistic solution. The analytical solution procedure and the simulation procedure are performed recursively until a near optimal solution is achieved. The experimental results show that the near optimal solution is approached in a fairly short amount of time.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.9C
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• pp.820-825
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• 2007

Super-orthogonal space-time trellis code (SOTTC) uses the expanded set of the orthogonal space-time block code to obtain coding gain and diversity gain without loss of transmit rate. In SOSTTCs, signal set expansions are performed by rotating the first column of the code matrix. The rotating phases used previously were selected to avoid the signal constellation expansion rather than the performance improvement. In this paper, we make a design criterion to select the proper rotating phase to improve the performance of SOSTTCs for fast Rayleigh fading channels. In addition, we design improved SOSTTCs by using the proper rotating phase. Simulation results are also provided to confirm our SOSTTCs are superior to the previous SOSTTCs in the view of BER performance.

• 제어로봇시스템학회:학술대회논문집
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• 2004.08a
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• pp.1915-1919
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• 2004

In this paper, we propose a new discrete-time predictive current controller for a PMSM(Permanent Magnet Synchronous Motor). The main objectives of the current controllers are to ensure that the measured stator currents tract the command values accurately and to shorten the transient interval as much as possible, in order to obtain high-performance of ac drive system. The conventional predictive current controller is hard to implement in full digital current controller since a finite calculation time causes a delay between the current sensing time and the time that it takes to apply the voltage to motor. A new control strategy in this paper is seen the scheme that gets the fast adaptation of transient current change, the fast transient response tracking and is proposed simplified calculation. Moreover, the validity of the proposed method is demonstrated by numerical simulations and the simulation results will be verified the improvements of predictive controller and accuracy of the current controller.