• Proceedings of the KIEE Conference
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• 2008.04a
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• pp.99-100
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• 2008

This paper proposes a Gaussian Mixture Model (GMM) - based speech emotion recognition methods using four feature parameters; 1) Fast Fourier Transform(FFT) spectral entropy, 2) delta FFT spectral entropy, 3) Mel-frequency Filter Bank (MFB) spectral entropy, and 4) delta MFB spectral entropy. In addition, we use four emotions in a speech database including anger, sadness, happiness, and neutrality. We perform speech emotion recognition experiments using each pre-defined emotion and gender. The experimental results show that the proposed emotion recognition using FFT spectral-based entropy and MFB spectral-based entropy performs better than existing emotion recognition based on GMM using energy, Zero Crossing Rate (ZCR), Linear Prediction Coefficient (LPC), and pitch parameters. In experimental Results, we attained a maximum recognition rate of 75.1% when we used MFB spectral entropy and delta MFB spectral entropy.

• Proceedings of the IEEK Conference
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• 2001.09a
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• pp.103-106
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• 2001

본 논문은 radix-2 FFT를 파이프라인 기법으로 구현할때의 성능 향상을 위한 메모리 어드레싱기법에 대한 새로운 구조를 제안하고자 한다. Fast Fourier Transform(FFT) 프로세서의 속도 및 성능은 파이프라인 싸이클과 클럭에 좌우되므로, 동시에 병렬로 처리하기 위한 입력 데이타에 access 하기 위해 사용되어지는 기존의 메모리 어드레싱 기법은 지연문제로 인해 FFT 프로세서 성능 저하의 원인이 된다. 이 기법은 정확한 메모리 뱅크를 선택하기 위한 주소부 패러티 체크가 필요 없으므로 수행 속도를 빠르게 하고, ROM에 저장된 Coefficient의 실수부와 허수부의 상호교환특성을 이용하여 Coefficient ROM을 반으로 줄일 수 있다. 이 논문에서 제안된 구조는 VHDL을 사용하여 설계하였고, 설계된 회로를 시뮬레이션 및 합성시켰다.

• Proceedings of the Korea Information Processing Society Conference
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• 2005.05a
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• pp.1777-1780
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• 2005

OFDM(Orthogonal Frequency Division Multiplexing)은 제 4 세대 기술로 일컬어지는 변조 방식으로 최근 유럽의 디지털 오디오 방송(DAB)과 디지털 비디오 방송(DVB)에 표준으로 사용되고 있으며, IEEE 802.11a 무선 LAN 및 디지털 가입자라인 xDSL 에서도 사용되고 있다. 본 논문에서는 OFDM 모뎀 구현의 핵심이라고 할 수 있는 64-포인트 FFT(Fast Fourier Transform) 프로세서의 여러 가지 구조를 분석하고, 이들과 비교하여 성능 대 면적 비를 획기적으로 향상시킨 새로운 FFT 프로세서인 Radix-4,2 SIC (Single Instruction Computer) 구조를 제안하였다. 본 논문에서 제안하는 SIC 구조는 버터플라이 연산의 재사용을 극대화하였으며 Radix-4,2 알고리즘을 사용함으로써 FFT 프로세서에서 면적의 80%를 차지하는 복소곱셈기의 수를 감소시켜 크기를 획기적으로 줄인 결과를 보여 준다.

• ETRI Journal
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• v.29 no.1
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• pp.79-88
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• 2007

This paper proposes a novel concept of adjusting the hardware size in a multi-carrier code division multiple access (MC-CDMA) receiver in real time as per the channel parameters such as delay spread, signal-to-noise ratio, transmission rate, and Doppler frequency. The fast Fourier transform (FFT) or inverse FFT (IFFT) size in orthogonal frequency division multiplexing (OFDM)/MC-CDMA transceivers varies from 1024 points to 16 points. Two low-power reconfigurable radix-4 256-point FFT processor architectures are proposed that can also be dynamically configured as 64-point and 16-point as per the channel parameters to prove the concept. By tailoring the clock of the higher FFT stages for longer FFTs and switching to shorter FFTs from longer FFTs, significant power saving is achieved. In addition, two 256 sub-carrier MC-CDMA receiver architectures are proposed which can also be configured for 64 sub-carriers in real time to prove the feasibility of the concept over the whole receiver.

• Journal of Communications and Networks
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• v.18 no.1
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• pp.27-39
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• 2016

This paper derives and analyzes a novel block fast Fourier transform (FFT) based joint detection algorithm. The paper compares the performance and complexity of the novel block-FFT based joint detector to that of the Cholesky based joint detector and single user detection algorithms. The novel algorithm can operate at chip rate sampling, as well as higher sampling rates. For the performance/complexity analysis, the time division duplex (TDD) mode of a wideband code division multiplex access (WCDMA) is considered. The results indicate that the performance of the fast FFT based joint detector is comparable to that of the Cholesky based joint detector, and much superior to that of single user detection algorithms. On the other hand, the complexity of the fast FFT based joint detector is significantly lower than that of the Cholesky based joint detector and less than that of the single user detection algorithms. For the Cholesky based joint detector, the approximate Cholesky decomposition is applied. Moreover, the novel method can also be applied to any generic multiple-input-multiple-output (MIMO) system.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.13 no.1
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• pp.35-41
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• 2020

Fast Fourier transform (FFT) processors have been widely used in various application such as communications, image, and biomedical signal processing. Especially, high-performance and low-power FFT processing is indispensable in OFDM-based communication systems. This paper presents a novel radix-26 FFT algorithm with low computational complexity and high hardware efficiency. Applying a 7-dimensional index mapping, the twiddle factor is decomposed and then radix-26 FFT algorithm is derived. The proposed algorithm has a simple twiddle factor sequence and a small number of complex multiplications, which can reduce the memory size for storing the twiddle factor. When the coefficient of twiddle factor is small, complex constant multipliers can be used efficiently instead of complex multipliers. Complex constant multipliers can be designed more efficiently using canonic signed digit (CSD) and common subexpression elimination (CSE) algorithm. An efficient complex constant multiplier design method for the twiddle factor multiplication used in the proposed radix-26 algorithm is proposed applying CSD and CSE algorithm. To evaluate performance of the previous and the proposed methods, 256-point single-path delay feedback (SDF) FFT is designed and synthesized into FPGA. The proposed algorithm uses about 10% less hardware than the previous algorithm.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.2
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• pp.174-184
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• 2013

For the successful R&D and deployment of LED-based green energy lighting systems, the real-time power quality measurement of both various non-linear power signals including pulse waveform, spike waveform, etc and the undesired-signals including harmonics, sag, swell, etc is required. In this paper, we propose a low-cost power quality measurement (PQM) method for low- (60Hz-several KHz) to high-frequency (several tens KHz) power signals, which are generated by green-energy lighting systems, and implement a PQM testbed using TI TMS320F28335 MCU. The proposed algorithm is programmed using C in the CCS (Code Composer Studio) 3.3 environment and is verified using test signals generated by an arbitrary signal generator, NF-WF1974. In the implemented testbed, we can measure various non-linear current signals that LED SMPS generates, analyze harmonics by fast Fourier transform, and test sag, swell, and interruption using wavelet transform.

• Journal of Korea Technical Association of The Pulp and Paper Industry
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• v.41 no.5
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• pp.50-58
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• 2009

Periodic variation of local paper structure was evaluated using two-dimensional fast Fourier transform (FFT) and spectral analysis. Since the periodic variation could originate from various sources and have different magnitudes and patterns depending on the origins, a complete analysis of local paper structure properties such as local grammage, local thickness, local apparent density and surface topography was proposed in this study. For a commercial copy paper, the individual periodic patterns for each local structural property were identified by using inverse FFT spectrums of the filtered spectrum. The spectral analysis of newsprint sample provided the period of variation quantitatively, which was useful in comparing the origins of the individual periodic patterns of the local structural properties.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.429-430
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• 2008

FFT(Fast Fourier Transform)는 멀티미디어 통신 및 디지털 신호처리 분야, 특히 무선통신이나 디지털 방송 등에서 쓰이는 OFDM(Orthogonal Frequency Division Multiplexing)에서 필수적인 역할을 하고 있다. 본 논문에서는 파이프라인 FFT 프로세서 설계의 다양한 알고리즘 및 하드웨어 구조에 대해 살펴보고 이를 한 눈에 파악할 수 있는 설계 가이드라인을 제시한다. 또한 분석 중 Radix-2 Single-path Delay Feedback의 복소곱셈기의 비효율적인 면을 찾고 새로운 R2SDF 구조를 제안한다.

• Journal of Positioning, Navigation, and Timing
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• v.12 no.1
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• pp.59-65
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• 2023

A GNSS receiver must perform signal acquisition to estimate the code phase and Doppler frequency of the incoming satellite signals, which are essential information for baseband signal processing. Modernized GNSS signals have different modulation schemes and long PRN code lengths from legacy signals, which makes it difficult to acquire the signals and increases the computational complexity and time. This paper proposes a novel FFT/Inverse-FFT with baseband resampling to resolve the aforementioned challenges. The suggested algorithm uses a single block only for the FFT and thereby requires less hardware resources than conventional structures such as Double Block Zero Padding (DBZP). Experimental results based on a MATLAB simulation show this algorithm can successfully acquire GPS L1C/A, GPS L2C, Galileo E1OS, and GPS L5.