• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2013.06a
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• pp.267-269
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• 2013

본 논문은 제한된 1비트 변환 (Constrained One-Bit Transform : C1BT) 알고리즘의 정합 오차 기준의 동적 범위를 확장하는 알고리즘을 제안하였다. C1BT는 정합 오차 기준으로 SAD (Sum of Absolute Differences)를 사용하지 않고 CNNMP (Constrained Number of Non-Matching Points)를 사용하여 하드웨어 구현을 용이하게 하고 속도를 대폭 향상시켰다. 이는 기존의 움직임 예측 방법인 전역 탐색 알고리즘 (Full Search Algorithm: FSA)과 비교하여 연산량을 크게 줄였으나 움직임 예측의 정확도를 현저히 감소시켰다. 이 점을 개선하기 위해 이 논문에서는 C1BT의 정합 오차 기준을 확장하여 움직임 예측의 정확도를 높이는 알고리즘을 제안하였다. 기존의 C1BT와 제안하는 알고리즘을 비교한 결과에서 제안하는 알고리즘이 기존의 C1BT에 비해 움직임 예측의 정확도의 기준인 PSNR 측면에서 더 우수한 성능을 보였다.

• 한국전산유체공학회:학술대회논문집
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• 1995.04a
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• pp.5-29
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• 1995

A three-dimensional flow field induced by two trains passing by each other inside a tunnel is studied based on the numerical simulation of the three-dimensional compressible Euler/Navier-Stokes equations formulated in the finite difference approximation. Domain decomposition method with the FSA(fortified solution algorithm) interface scheme is used to treat this moving-body problem. The computed resluts show basic characteristic of the flow field created when two trains passing by each other. History of the pressure distributions and the aerodynamic forces acting on the trains are mailnly discussed. The results indicate that the phenomenon is complicated due to the interaction of the flow induced by two trains. Strong side force occurs between the two trains when the front portion of the opposite train passes by. It fluctuates rapidly and maximum suction force occurs when two trains are aligned side by side. The results also indicate the effectiveness of the present numerical method for moving boundary problems.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2011.11a
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• pp.211-214
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• 2011

비디오 압축 기법에서 움직임 추정 (Motion Estimation)은 매우 중요한 부분을 차지하는데, 그것은 움직임 추정이 화질과 인코딩 시간에 직접적으로 영향을 미치기 때문이다. 가장 기본적인 움직임 추정 기법은 전역 탐색 기법 (Full Search Algorithm, FSA)인데, 이는 가장 좋은 화질을 보여주긴 하지만 매우 많은 계산량을 필요로 한다는 단점이 있다. 따라서 좋은 화질을 유지하면서도 계산량을 낮추기 위한 많은 고속 탐색 알고리즘들이 제안되었다. 이 논문에서는 고속 탐색 알고리듬 중 하드웨어 구현 시 많은 이점을 가진 1비트 변환 알고리듬 (One-bit Transform-based Motion Estimation, 1BT)을 소개하고 1비트 변환 알고리듬의 방법에 있어서 기존의 1비트 변환 알고리듬의 PSNR을 유지하면서 좀 더 빠른 속도로 인코딩이 가능한 커널 및 알고리듬을 제시한다. 실험결과에 따르면 우리가 제안한 알고리듬은 기존의 1비트 변환 알고리듬과 비슷한 PSNR을 유지하면서 속도가 향상된 것을 볼 수 있었다.

• Journal of KIISE:Software and Applications
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• v.29 no.1_2
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• pp.98-113
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• 2002

In this paper, we present advanced algorithms to reduce the computations of block matching algorithms for motion estimation in video coding. Advanced multi-level successive elimination algorithms(AMSEA) are based on the Multi-level successive elimination algorithm(MSEA)[1]. The first algorithm is that when we calculate the sum of absolute difference (SAD) between the sum norms of sub-blocks in MSEA, we use the partial distortion elimination technique. By using the first algorithm, we can reduce the computations of MSEA further. In the second algorithm, we calculate SAD adaptively from large value to small value according to the absolute difference values between pixels of blocks. By using the second algorithm, the partial distortion elimination in SAD calculation can occur early. So, the computations of MSEA can be reduced. In the third algorithm, we can estimate the elimination level of MSEA. Accordingly, the computations of the MSEA related to the level lower than the estimated level can be reduced. The fourth algorithm is a very fast block matching algorithm with nearly 100% motion estimation accuracy. Experimental results show that AMSEA are very efficient algorithms for the estimation of motion vectors.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.38 no.5
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• pp.509-517
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• 2001

Full-search algorithm requires large amount of computation which causes time delay or very complex hardware architecture for real time implementation. In this paper, we propose a fast motion estimator based on bit-plane matching, which reduce the computational complexity and the hardware cost. In the proposed motion estimator, the conventional motion estimation algorithms are applied to the binary images directly extracted from the video sequence. Furthermore, in the proposed VLSI motion estimator, we employ a Pair of processing cores that calculate the motion vector continuously By controlling the data flow in a systolic fashion using the internal shift registers in the processing cores, we avoid using SRAM (local memory) so that we remove the time overhead for accessing the local memory and adopt lower-cost fabrication technology. We modeled and tested the proposed motion estimator in VHDL, and then synthesized the whole system which has been integrated in a 0.6-$\mu$m triple-metal CMOS chip of size 8.15 X 10.84$\textrm{mm}^2$.

• The Journal of the Acoustical Society of Korea
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• v.18 no.2
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• pp.3-10
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• 1999

This paper describes the development and evaluation of a Korean address input system employing automatic speech recognition technique as user interface for input Korean address. Address consists of cities, provinces and counties. The system works on a window 95 environment of personal computer with built-in soundcard. In the speech recognition part, the Continuous density Hidden Markov Model(CHMM) for making phoneme like units(PLUs) and One Pass Dynamic Programming(OPDP) algorithm is used for recognition. For address recognition, Finite State Automata(FSA) suitable for Korean address structure is constructed. To achieve an acceptable performance against the variation of speakers, microphones, and environmental noises, Maximum a posteriori(MAP) estimation is implemented in adaptation. And to improve the recognition speed, fast search method using variable pruning threshold is newly proposed. In the evaluation tests conducted for the 100 connected words uttered by 3 males the system showed above average 96.0% of recognition accuracy for connected words after adaption and recognition speed within 2 seconds, showing the effectiveness of the system.