• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.10
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• pp.34-42
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• 2009

HAO is a ORB engine to support the logic-based CORBA component developments in FPGA. In this papers, in order to give the interoperability between general CORBA and HAO, we propose newly the specialization of GIOP(General Inter-ORB Protocol) from consideration of FPGA. It compose of the two major capability. First, it can abstract the hardware structure from the various system board environments. Secondly, also it is possible to minimize the monopoly occupation for shared resource such as system bus, external memory.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.3A
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• pp.185-196
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• 2009

SCA is proposed in order to operate various wireless systems in the single terminal platforms and uses the CORBA middleware to guarantee the platform-independence for software components. As the reconstruction demand is expanded in the software component to the logic level to many reasons, CORBA has to guarantee the independence of hardware on board. Accordingly. the characteristics depending on hardware board is ed. And the IDL-based interworking interface about the component has to be provided. In this paper, we described about local transport for guaranteeing the independency on the hardware board and the HAO Core for providing a coupling by the CORBA IDL identically with the other component. HAO produced at 2,900 logic cell size in average and provided the performance of the tens times than the software component. Through the use of HAO in the SCA-based development environment, it was naturally expanded to not only the software area but also the FPGA logic.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.11
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• pp.40-49
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• 2009

HAO is a ORB engine to support the logic-based CORBA development environments in FPGA. In this papers, in order to support the logic component developments with HAO, we proposes the translation rule from IDL to VHDL, and the generation of skeleton logic code following the rule. It enables to guarantee the interoperability between the components in distributed multi processor environments includes the general purpose processor and FPGAs, and to improve the performance through the usage of logic-circuit.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.6
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• pp.66-77
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• 2009

In this paper, we propose a CORBA middleware extension which is suitable to SCA based communication environment. The extensions guarantee the components to interconnect others without consideration about its implementation way and enables the developers to easily achieve the performance improvements in comparison to the existing methodology. This extension includes the HAO, the IDL2VHDL compiler, and the improvement of ORBit. The HAO is ORB implemented in logic level and is limited the some function according to the characteristic of FPGA. In addition, the IDL2VHDL compiler provides the mapping from CORBA IDL to VHDL, the VHSIC hardware description language, and the additional procedures for processing the component. Finally, the improved ORBit, CORBA ORB on GPP, can be direct connecting with the HAO on FPGA.