• Title/Summary/Keyword: FH/SS

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Analysis of the effect of Digital frequency synthesizer in FSK-Frequency-hopped data communications (FSK-주파수 도약 데이터 통신시스템에서의 디지털 주파수 합성기의 영향분석)

  • 송인근
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.7 no.5
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    • pp.879-886
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    • 2003
  • Agile frequency synthesizers are the common device used for commandable, wide-band frequency hopping in frequency-hopped (FH) communications. In this paper, synthesizer phase transient effect and its compensation methods in an FH/FSK(Frequency Hopped Frequency Shift Keying) system are studied. Models for these analysis are developed and resulting performance degradations are computed. The basic PLL is difficult to implement for fast frequency hopping in narrowband radio communication systems. To solve this problem, digital frequency synthesizer/CPM (Continuous Phase Modulation)modulator is proposed. And it's performance is analyzed theoretically. The analysis show that fast frequency hopping is possible in frequency hopping system that use digital frequency synthesizer/CPM modulator.

Performance Comparisons of Two Inner Coding Structures in Concatenated Codes for Wireless Multimedia / Multicast Transmission on Shipboard (해상환경에서 선박내 무선 이동 멀티캐스트/멀티미디어 전송을 위한 쇄상부호의 내부호 구조 성능비교 연구)

  • Lee, Ye Hoon;Lee, Seong Ro
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.39C no.12
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    • pp.1323-1326
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    • 2014
  • In this letter, we compare the performance of two concatenated coding structures in slow FH/SS systems for multimedia/multicast transmission on shipboard. Two outer code symbols are transmitted during a hop. The first structure consists of one inner codeword per one outer code symbol, while the second structure consists of one inner codeword per two outer code symbols. We analyze the overall block error probability in asymptotic region and show that the performance of the second scheme is superior to the first one.

Design of the PHY Structure of a Voice and Data Transceiver with Security (보안성을 갖는 음성 및 데이터 트랜시버의 물리 계층 구조 설계)

  • Eun, Chang-Soo;Lom, Sun-Min;Lee, Kyoung-Min
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.10 s.352
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    • pp.46-54
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    • 2006
  • In this paper, we propose a digital transceiver that can overcome the problems which current analog transceivers have. For the proposed transceiver, we assumed a frequency resource that consists of discrete and narrow channels. We also assumed that person-to-group, group-to-group, as well as person-to-person, voice and data communications with moderate security should be devisedand the data rate is 1 Mbps with simultaneous voice and data. Frequency hewing spread spectrum (FH-SS) and differential 8-PSK (D8PSK) were adopted for security reasons and bandwidth constraints, and for the reduction of implementation complexity, respectively. For the carrier and the symbol timing recovery, the structure of the preamble was proposed based on the IEEE 802.11 FHSS frame format to improve detection probability. The computer simulation results and power budget analysis implies that the proposed system can be usedin simple wireless communications in place of such as analog walkie-talkies.

A Study on the Expertment of Selective Frequency Hopping System (선택성 주파수 호핑 시스템의 실현에 관한 연구)

  • 정용주;김원후
    • Proceedings of the Korean Institute of Communication Sciences Conference
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    • 1987.04a
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    • pp.201-205
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    • 1987
  • In FH-SS systems when the bopping band is enough wide to onerlap with conventional band limited communication cethod (CBM). The portion of suchacts as an interfering signal. Thus it is gard to use them all together. This paper presents how the frequency gopping systems can simultaneously share the same band with CBM. The proposed mithod is that the frequency gopping band can arbitraily controlled by setting the specific input bith of digital frequency synthesizer to logical zero state We realized this by putting the hopping band Controller between pseudeo random generater and frequency synthesizer.

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Analysis and design of a FSK Demodulator with Digital Phase Locked Loop (디지털 위상고정루프를 이용한 ESK복조기의 설계 및 성능 분석)

  • 김성철;송인근
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.7 no.2
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    • pp.194-200
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    • 2003
  • In this paper, FSK(Frequency Shift Keying) demodulator which is widely used for FH-SS system is designed and the experimental results are analyzed. The performance of the ADPLL(All-digital Phase-Locked-Loop), which is the main part of the demodulator circuit, is analyzed by the computer program. Using Maxplus-II tool provided by altera. co., ltd, each part of the ADPLL is designed and all of them is integrated into EPM7064SLC44-10 chip. And the simulation results are compared with the characteristics of the implemented circuits for analysis. There is about 2${\mu}\textrm{s}$ difference in time constant of the PLL. This difference is not critical in the demodulator. And the experimental results show that the transmitted data is well demodulated when the phase difference between the FSK modulated signal and the reference signal is about 180 degree.

A Study of Anti-Jamming Performance using A-NED(Adaptive NED) Algorithm of SFH(Slow Frequency Hopping) Satellite Communication Systems in PBNJ (부분 대역 재밍 환경에서 SFH(Slow Frequency Hopping) 위성 통신 방식을 사용하는 A-NED(Adaptive NED) 알고리즘 항재밍 성능 분석)

  • Kim, Sung-Ho;Shin, Kwan-Ho;Kim, Hee-Jung;Kim, Young-Jae
    • Journal of the Korea Institute of Military Science and Technology
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    • v.13 no.1
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    • pp.30-35
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    • 2010
  • As of today, Frequency Hopping techniques are widely used for over-channel interference and anti-jamming communication systems. In this paper, analysis the performance of robustness on the focus of some general jamming channel. In FH/SS systems, usually SFH(Slow Frequency Hopping) and FFH(Fast Frequency Hopping) are took up on many special communication systems, the SFH, FFH are also combined with a channel diversity algorithm likes NED(Normalized Envelop Detection), EGC(Equal Gain Combines) and Clipped Combines to overcome jammer's attack. This paper propose Adaptive-NED and shows A-NED will be worked well than the others in the some general jamming environments.

A Study on the Diversity Reception Performance of Spread Spectrum Signals in Interference and Fading Environments (간섭과 페이딩환경에서 스펙트럼 확산(SS) 통신 신호의 다이버시티 수신 특성에 관한 연구)

  • 강희조;이권현;조성준
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.19 no.5
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    • pp.901-911
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    • 1994
  • The error performance of M-ary differential phase shift keying (MDPSK) through m-distribution fading channel in hybrid direct sequence/slow frequency hopped spread spectrum multiple access (DS/SFH-SSMA) systems has been evaluated, and also the error probability has been evaluate when adopting diversity technique and coding technique. From the results, we know that the error performance more deteriorates as depth of fading becomes deeper. In Rayleigh fading environment (m=1), increasing of the number of frequency hopping (q) reduces the effect of multiple access interference, because it decreases the probability a hit. When q is much larger than the number of user (K), the probability of error in high E/N region is dominated by the multipath interference while the multiple access interference is negligible. In lower E/N region, the probability of error is independent of q because the effect of gaussian noise becomes dominat.

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Design and Performance Analysis of the Digital Phase-Locked Loop For Frequency Hopping Spread Spectrum system (주파수도약 대역확산시스템을 위한 디지털 위상고정루프의 설계 및 성능분석)

  • Kim, Seong-Cheol
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.5
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    • pp.1103-1108
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    • 2010
  • In this paper, Frequency Synthesizer which is widely used for FH-SS system is proposed and the experimental results are analyzed. The performance of the DPLL(Digital Phase-Locked-Loop), which is the main part of the Synthesizer is analyzed by the computer program. Using Maxplus-II tool provided by altera. co., ltd, each part of the DPLL is designed and all of them is integrated into EPM7064SLC44-10 chip. And the simulation results are compared with the characteristics of the implemented circuits for analysis. And the experiential results show that the N value of the loop filter is toggled to adjacent N value, which result in phase jitter of the output. It can be resolved by increasing DCO(Digital Controlled oscillator) clock rate.