• Journal of the Korea Institute of Military Science and Technology
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• v.6 no.1
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• pp.91-107
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• 2003

A 2-dimensional search process in the time and frequency domain is required to acquire the GPS signal, when the code phase and the carrier Doppler for the specified GPS satellite signal are unknown. This paper proposes a new scheme, called Squared-D Searching Method, which can reduce the number of carrier frequency candidates, and a new scheme, named extended Multiple Correlator(XMC), which can reduce the number of code phase candidates. The Squared-D Searching Method can take the twice of Doppler frequency, therefore it can find carrier frequency candidates. The XMC is different from the general multiple correlator in that a combined form of the locally generated codes is used for despreading. Also, this paper tries to analyze a signal detection probability of a GPS receiver under more realistic environments. The result shows that lower detection probability can be obtained when the phase differences among the codes are larger in the correlation arms of a multiple correlator. This phenomenon is not easy to explain with the previous results. And besides, the result shows that proposed acquisition schemes give better performance than a conventional acquisition scheme.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.14 no.2
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• pp.164-176
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• 1989

With reference to the Spread Spectrum techniqeu diseussed and further extended by many investigators, the Peseudo-noise Code Polarity Modulation (PNCPM) technique has proposed in this paper. By using this new technique of PNCPM, some problems pertaining to the Spread Spectrum mode has been sloved. In addition by the PNCPM mode it is proposed that data shifting can be easily demodulated every clock(frame) by measn of simple hardware implementaton for the purpose of operating of the asynchroniged detection mode. And in this paper it is shown that PNCPM mode can be easily implemented by the CCD correlator, and is applicable to the Spread Spectrum Multiple Access.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.12C
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• pp.1288-1298
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• 2002

To implement elliptic curve cryptosystem in GF(2$\^$m/) at high speed, a fast divider is required. Although bit-parallel architecture is well suited for high speed division operations, elliptic curve cryptosystem requires large m(at least 163) to support a sufficient security. In other words, since the bit-parallel architecture has an area complexity of 0(m$\^$m/), it is not suited for this application. In this paper, we propose a new serial-in serial-out systolic array for computing division operations in GF(2$\^$m/) using the standard basis representation. Based on a modified version of tile binary extended greatest common divisor algorithm, we obtain a new data dependence graph and design an efficient bit-serial systolic divider. The proposed divider has 0(m) time complexity and 0(m) area complexity. If input data come in continuously, the proposed divider can produce division results at a rate of one per m clock cycles, after an initial delay of 5m-2 cycles. Analysis shows that the proposed divider provides a significant reduction in both chip area and computational delay time compared to previously proposed systolic dividers with the same I/O format. Since the proposed divider can perform division operations at high speed with the reduced chip area, it is well suited for division circuit of elliptic curve cryptosystem. Furthermore, since the proposed architecture does not restrict the choice of irreducible polynomial, and has a unidirectional data flow and regularity, it provides a high flexibility and scalability with respect to the field size m.