• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.252-255
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• 2004

반도체는 high integrated, high speed, low power를 위하여 design 뿐만 아니라 재료 측면에서도 많은 변화를 가져오고 있으며, RC delay time을 줄이기 위하여 Al 배선보다 비저항이 낮은 Cu와 low-k material 적용이 그 대표적인 예이다. 그러나, Cu 배선의 경우 dry etching이 어려우므로, 기존의 공정으로는 그 한계를 가지므로 damascene 또는 dual damascene 공정이 소개, 적용되고 있다. Damascene 공정은 절연막에 photo와 RIE 공정을 이용하여 trench를 형성시킨 후 electrochemical plating 공정을 이용하여 trench에 Cu를 filling 시킨다. 이후 CMP 공정을 이용하여 절연막 위의 Cu와 barrier material을 제거함으로서 Cu 배선을 형성하게 된다. Dual damascene 공정은 trench와 via를 동시에 형성시키는 기술로 현재 대부분의 Cu 배선 공정에 적용되고 있다. Cu CMP는 기존의 metal CMP와 마찬가지로 oxidizer를 이용한 Cu film의 화학반응과 연마 입자의 기계가공이 기본 메커니즘이다. Cu CMP에서 backside pressure 영향이 uniformity에 미치는 영향을 살펴보았으며, electrochemical plating 공정에서 발생하는 hump가 CMP 결과에 미치는 영향과 dishing 결과를 통하여 그 영향을 평가하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.559-562
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• 2004

The $high-T_c$ Superconducting(HTS) antenna which consists of "H" type resonator has the benefits for the miniaturization of antenna in comparison with the microstrip antenna of the similar dimension. To fabricate the "H" type antenna HTS $YBa_2Cu_3O_{7-x}$(YBCO) thin films were deposited on MgO substrates using rf-magnetron sputtering. Standard etching processes were performed for the patterning of the "H" type antenna. For comparison between normal conducting antennas and superconducting antennas, the gold antennas with the same dimension were also fabricated. An aperture coupling was used for impedance matching between $50\Omega$ feed line and HTS radiating patch. The diverse experimental results were reported in terms of the resonant frequency, the return loss and the characteristics impedance. The "H" type superconducting antenna showed the performance of 1.36 in SWR, 24 % in efficiency, and 14.6 dB in the return loss superior to the normal conducting counterpart.

• Journal of Power System Engineering
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• v.18 no.6
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• pp.159-165
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• 2014

On this work, the importance of industrial ventilation was investigated and examined the theoretical point and problems about general ventilation of factory exposed on high temperature during summer. As a case study, the ventilation planning of the printed circuit board (PCB) etching process for an electronic company was carried out and each of those characteristics were compared by installing actual ventilation systems and measuring the changing state of the working environment in accordance with ventilation method during summer. The purpose of the study is to present an efficient ventilation method for a factory with a closed structure under high temperature environment. In summary, for a factory with a sealed structure such as the target PCB manufacturing factory in this study, the forced supply and exhaust method was the most appropriate ventilation method for maintaining a low.

• Journal of the Korean Vacuum Society
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• v.12 no.4
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• pp.257-262
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• 2003

The structure and optical properties of n-type and p-type porous silicon (PS) prepared by the chemical etching in the light and the dark, respectively, are reported in this paper. Microstructural features of the samples are mainly investigated by SEM, AFM XRDGI techniques. Also, their optical properties are investigated by photoluminescence (PL) and Fourier transform infrared absorption measurements. In the n-type PS, the room temperature photoluminescence is observed in a visible range from 500 nm to 650 nm in contrast to that in the blue region (400∼650 nm) in p-type PS. Further, semi-transparent Cu films in thickness range of ∼40 nm are deposited by rf-magnetron sputtering on PS to investigate the I-V characteristics of the samples.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.84-84
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• 2010

In this study, we report on the novel lithographic patterning method to fabricate organic-semiconductor devices based on photo and e-beam lithography with well-known silicon technology. The method is applied to fabricate pentacene-based organic field effect transistors. Owing to their solubility, sub-micron sized patterning of P3HT and PEDOT has been well established via micromolding in capillaries (MIMIC) and inkjet printing techniques. Since the thermally deposited pentacene cannot be dissolved in solvents, other approach was done to fabricate pentacene FETs with a very short channel length (~30nm), or in-plane orientation of pentacene molecules by using nanometer-scale periodic groove patterns as an alignment layer for high-performance pentacene devices. Here, we introduce the atomic layer deposition of $Al_2O_3$ film on pentacene as a passivation layer. $Al_2O_3$ passivation layer on OTFTs has some advantages in preventing the penetration of water and oxygen and obtaining the long-term stability of electrical properties. AZ5214 and ma N-2402 were used as a photo and e-beam resist, respectively. A few micrometer sized lithography patterns were transferred by wet and dry etching processes. Finally, we fabricated sub-micron sized pentacene FETs and measured their electrical characteristics.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2008.05a
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• pp.269-272
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• 2008

LGP is a key component of LCD back light unit because it determines the brightness and sharpness of display image. Usually, it has optical patterns fabricated on the bottom surface. In the present paper the LiGA-reflow method was applied to fabricate the LGP mold. Furthermore, the optical simulation considering the replication ratio of pattern height was applied to the pattern design. The optical simulation through systematic correction scheme helped find the optimum distribution of pattern density. Finally, the stamper fabricated by this method was installed in the mold and LGP was produced by injection molding. As a result of luminance measurement for the final product, the average luminance and luminance uniformity was measured 3,180 nit and 84%, respectively. Consequently, the mold fabrication method using the LiGA-reflow and optical simulation(CAE) can save the expense and time compared with the existing fabrication methods(laser ablation and chemical etching).

• Design & Manufacturing
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• v.15 no.4
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• pp.57-64
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• 2021

In recent materials industry, researches on the technology to manufacture super hydrophobic surface by effectively controlling the wettability of solid surface are expanding. Research on the fabrication of super hydrophobic surface has been studied not only for basic research but also for self-cleaning, anti-icing, anti-friction, flow resistance reduction in construction, textile, communication, military and aviation fields. A super hydrophobic surface is defined as a surface having a water droplet contact angle of 150 ° or more. The contact angle is determined by the surface energy and is influenced not only by the chemical properties of the surface but also by the rough structure. In this paper, maskless lithography using DMD, electro etching, anodizing and hot embossing are used to make the polymer resin PMMA surface super hydrophobic. In the fabrication of microstructure, DMDs are limited by the spacing of microstructure due to the structural limitations of the mirrors. In order to overcome this, maskless lithography using a transfer mechanism was used in this paper. In this paper, a super hydrophobic surface with micro and nano composite structure was fabricated. And the wettability characteristics of the micro pattern surface were analyzed.

• Journal of Sensor Science and Technology
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• v.33 no.3
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• pp.173-178
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• 2024

Development of pressure sensors for harsh environments with high pressure, humidity, and temperature is essential for many applications in the aerospace, marine, and automobile industries. However, existing materials such as polymers, adhesives, and semiconductors are not suitable for these conditions and require materials that are less sensitive to the external environment. This study proposed a pressure sensor that could withstand harsh environments and had high durability and precision. The sensor comprised a piezoresistor pattern and an insulating film directly formed on a stainless-steel membrane. To achieve the highest sensitivity, a pattern design method was proposed that considered the stress distribution in a circular membrane using finite element analysis. The manufacturing process involved depositing and etching a dielectric insulating film and metal piezoresistive material, resulting in a device with high linearity and slight hysteresis in the range of a maximum of 40 atm. The simplicity and effectiveness of this sensor render it a promising candidate for various applications in extreme environments.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.37 no.5
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• pp.527-532
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• 2024

Physically Unclonable Functions (PUFs) provide a high level of security for private keys using unique physical characteristics of hardware. However, fabricating PUF chips requires numerous semiconductor processes, leading to high costs, which limits their applications. In this work, we introduce a low-cost manufacturing method for PUF security chips. First, surface roughening through wet-etching is utilized to create random variables. Additionally, physical vapor deposition is added to further enhance randomness. After PUF chip fabrication, both Hamming distance (HD) and Hamming weight (HW) are extracted and compared to verify the fabricated chip. It is confirmed that the PUF chip using two different multiple process variables demonstrates superior uniqueness and uniformity compared to the PUF security chip fabricated using only a single process variable.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.27 no.6
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• pp.282-288
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• 2017

In this paper, GaAs/AlGaAs multi-layer structure was grown by liquid phase epitaxy with graphite sliding boat, which can be used as a device structure of a photocathode image sensor. The multi-layer structure was grown on an n-type GaAs substrate in the sequence as follows: GaAs buffer layer, Zn-doped p-type AlGaAs layer as etching stop layer, Zn-doped p-type GaAs layer, and Zn-doped p-type AlGaAs layer. The Characteristics of GaAs/AlGaAs structures were analyzed by using scanning electron microscope (SEM), secondary ion mass spectrometer (SIMS) and hall measurement. The SEM images shows that the p-AlGaAs/p-GaAs/p-AlGaAs multi-layer structure was grown with a mirror-like surface on a whole ($1.25mm{\times}25mm$) substrate. The Al composition in the AlGaAs layer was approximately 80 %. Also, it was confirmed that the free carrier concentration in the p-GaAs layer can be adjusted to the range of $8{\times}10^{18}/cm^2$ by hall measurement. In the result, it is expected that the p-AlGaAs/p-GaAs/p-AlGaAs multi-layer structure grown by the LPE can be used as a device structure of a photoelectric cathode image sensor.