• IEMEK Journal of Embedded Systems and Applications
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• v.7 no.3
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• pp.151-156
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• 2012

When mounting the sensor device in the way of Plug&Play, sensor device drivers need to be loaded and linked dynamically. Since a sensor node platform is based on small 8 bit MCU, dynamic loading and linking technique used in Windows and Linux can not be applied. In this paper, we present how to link and load dynamically sensor device drivers for sensor device Plug&Play. We implement a prototype and evaluate it to make sure that there is no performance degradation like sensor device driver connection speed and memory usage. Connection speed overhead increases to 0.2ms. Memory usage overhead increases to hundreds byte. It shows that there is no heavy influence in running the actual program.

• Proceedings of the IEEK Conference
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• 2002.06e
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• pp.235-238
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• 2002

This paper proposes a novel scheme of designating non-cacheable addresses of memories in embedded systems of multi-master architectures without a Memory Management Unit (MMU). As a solution for data coherency problem between external memories and a cache memory, we proposes a cache masking scheme by allocating the most significant bit of address not used in 32-bit address system as indicator bit to designate non-cacheable address. As this scheme enables non-cacheable area designation every address, the simpler in the aspect of hardware and more flexible size of non-cacheable area can be obtained.

• IEMEK Journal of Embedded Systems and Applications
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• v.10 no.2
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• pp.81-89
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• 2015

In this paper, we proposed a new matrix transposition scheme, called asymmetry sub-matrix, and conducted the in-depth performance evaluation of the proposed scheme with other prior schemes, including element-major, row-major and sub-matrix schemes in large-scale matrix. In our results, the proposed asymmetry sub-matrix scheme shows the best performance compared to other prior schemes, while sub-matrix scheme shows the second best performance.

• IEMEK Journal of Embedded Systems and Applications
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• v.11 no.4
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• pp.209-218
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• 2016

This paper proposes a new lifetime aware buffer mapping method of a synchronous dataflow (SDF) graph on a hybrid memory system with DRAM and PRAM. Since the number of write operations on PRAM is limited, the number of written samples on PRAM is minimized to maximize the lifetime of PRAM. We improve the utilization of DRAM by mapping more buffers on DRAM through buffer sharing. The problem is formulated formally and solved by an optimal approach of an answer set programming. In experiment, the buffer mapping method with buffer sharing improves the PRAM lifetime by 63%.

• Proceedings of the Korean Society For Composite Materials Conference
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• 2003.04a
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• pp.10-13
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• 2003

The dynamic analysis of composite plate with embedded shape memory alloys (SMAs) is studied using the finite element method. Active frequency tuning of a composite plate under electrical heating of SMAs is analyzed. The actuation of SMAs is modeled by Brinson's one-dimensional constitutive equation. The influences of the boundary conditions, the ply orientations and the pre-strains of SMA wires on the thermo-dynamic response of composite plate are discussed. It is found that the effect of SMAs on the dynamic response of composite plate is significant.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.19 no.11
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• pp.994-999
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• 2006

For low-cost embedded EEPROM, in this paper, single polysilicon EEPROM and n-channel high-voltage LDMOST device are developed in a $0.25{\mu}m$ standard CMOS logic process. Using these devices developed, the EEPROM chip is fabricated. The fabricated EEPROM chip is composed of 1 Kbit single polysilicon EEPROM away and high voltage driver circuits. The program and erase characteristics of the fabricated EEPROM chip are evaluated using 'STA-EL421C'. The fabricated n-channel high-voltage LDMOST device operation voltage is over 10 V and threshold voltage window between program and erase states of the memory cell is about 2.0 V.

• Proceedings of the Korean Society of Computer Information Conference
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• 2017.07a
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• pp.275-278
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• 2017

기존의 임베디드 기기의 하드웨어는 리눅스의 장점에도 불구하고 임베디드 기기들의 프로세서나 메모리 등의 하드웨어 자원이 Built-in 형태로 제공되어 시스템 운용 환경 변화에 맞춘 대응이 어렵다. 이러한 문제를 해결하기 위해 본 논문에서는 i.MX6Q SABRE Board for Smart Devices를 참조하여 메모리를 교체할 수 있도록 SO-DIMM을 장착하고 PCIe 이더넷을 추가한 개발보드를 만들었다. 그리고 개발보드에 추가 및 변경 된 하드웨어 디바이스를 활성화한 새로운 임베디드 시스템을 이식하는 방법을 제시한다. 구현 및 성능 분석 결과 새로운 임베디드 시스템에서 운용자는 시스템 운용 시 환경 변화에 대응하여 메모리를 바꾸어 장착할 수 있게 되었고 이로 인해 시스템의 요구사항에 따라 자원의 확정성 및 유연성이 높아짐을 확인하였다.

• Proceedings of the KIEE Conference
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• 2004.05a
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• pp.147-149
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• 2004

Although most of the people have studied English for a long time, their English conversation capability is low. When we provide them portable conversational-type English learners by the application of computer and information process technology, such portable learners can be used to enhance their English conversation capability by their conventional conversation exercises. The core technology to develop such learner is the development of a voice recognition and synthesis module under an embedded environment. This paper deals with voice recognition and synthesis, prototype of the learner module using a DSP(Digital Signal Processing) chip for voice processing, voice playback function, flash memory file system, PC download function using USB ports, English conversation text function by the use of SMC(Smart Media Card) flash memory, LCD display function, MP3 music listening function, etc. Application areas of the prototype equipped with such various functions are vast, i.e. portable language learners, amusement devices, kids toy, control by voice, security by the use of voice, etc.

• 전자공학회논문지 IE
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• v.43 no.1
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• pp.52-58
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• 2006

In order to provide an efficient way to processing with limited resources, we propose a wavelet coder that operates with little memory usage on the portable embedded system. In order to reduce redundancy in coding process caused by repetitive scanning of wavelet coefficients, the proposed coder uses a 2D significance coefficient array (SCA) which records the bit-level information of wavelet coefficients. The 2D SCA improves memory usage and processing speed required for image coding because it can perform significance check and bit coding of coefficients simultaneously.

• Journal of Sensor Science and Technology
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• v.7 no.4
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• pp.285-292
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• 1998

Shape Memory Alloy(SMA) has been used in many engineering fields because of its good characteristics of actuator. For example, SMA wire can be embedded easily in the polymer composite laminate and then be used as actuator for structural control. Since the strain have a significant influence on the electrical resistance of SMA wire, It is a possible to use the SMA wire as a sensor of such physical quantities. In this study, the possibility for the application of Ni-Ti SMA wire as a sensor embedded within a composite laminate is investigated.