• Journal of Power Electronics
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• v.8 no.2
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• pp.121-130
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• 2008

This paper introduces a design and implementation of a digital control unit for an Oxygenaire Servo Baby Incubator. The control unit is designed and implemented according to international standards. The control unit is based on an AVR Atmel microcontroller unit. It is built for monitoring and control and displays the three main temperature values: set point temperature, baby skin temperature and air temperature. User friendly software is implemented. The implemented control unit was tested in the laboratory as well as in the field. The control unit is sensitive to change of $0.1^{\circ}C$. At startup, based on a unique control strategy, the incubator reaches its steady state in about 14 minutes. The system schematic diagrams are shown in the paper. Also, programs flow charts are presented. The control unit was designed and implemented based on a contract between the Electronics Research Institute (ERI) and ENGIMED Company. The authors would like to thank ERI and ENGIMED for introducing all required finance and shoring to complete this work.

• Proceedings of the KIEE Conference
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• 1987.07b
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• pp.1569-1572
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• 1987

The major objective of this paper is the design of control unit based on the bit slice technique. The branch control unit is device that provides 16-way branch when used in conjuction with the Microprogram Sequencer. The Next address control unit is designed specifically for next address control of the Microprogram Sequencer.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.47-50
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• 2007

The maximum current level in organic light emitting diodes (OLED) panel influences the maximum pixel luminance, the width of $V_{DD}$ lines, the maximum power consumption and the lifetime. We propose an algorithm that limits the overall current without any palpable image artifacts, and therefore, improve panel parameters by program.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.12
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• pp.9-19
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• 1997

This paper describes the design and FPGA implementation of a system control unit within a multiprocessor chip which can be used as a node processor ina massively parallel processing (MPP) caches, memory management units, a bus unit and a system control unit. Major functions of the system control unit are locking/unlocking of the shared variables of protected access, synchronization of instruction execution among four integer untis, control of interrupts, generation control of processor's status, etc. The system control unit was modeled in very high level using verilog HDL. Then, it was simulated and verified in an environment where trap handler and external interrupt controller were added. Functional blocks of the system control unit were changed into RTL(register transfer level) model and synthesized using xilinx FPGA cell library in synopsys tool. The synthesized system control unit was implemented by Xilinx FPGA chip (XC4025EPG299) after timing verification.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.950-954
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• 1998

This paper describes a development of traction unit for 2-motor driven electric vehicle (EV). The traction unit is consisted with an interior permanent magnet synchronous motor (IPMSM), a reduction gear and an inverter for electric vehicle that is driven by 2 motors without differential gear. For traction unit, prototype IPMSM and inverter have been developed. The IPMSM was designed by CAD program that was developed with both equivalent circuit method and FEM. Also the inverter was developed to drive 2 motors with 6 legs IGBT switches in a control board. The vector control algorithm was implemented with maximum torque control method in the constant torque region and field weakening control method in the constant power region considering inverter capacity. To verify that the traction unit is more high efficiency and has more high power density than a traction unit with induction motor with the same power, we would like to show the results about the design and analysis of the IPMSM and the experiment results about the traction unit.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.7
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• pp.1005-1014
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• 1990

This paper proposes the control unit of a 32-bit high-performance RISC type microprocessor. This control unit controls the whole data path of target processor and on chip instruction/data caches in 4-stage pipelined scheme. For the improvement of speed, large parts of data path and control unit are designed by domino-CMOS and hard-wired circuit technology. First, in this paper, target processor's instruction set and data path are defined, and next, all signals needed to control the data path are analyzed. The decoder of control unit and clock generated logic block are implemented in DCAL(Dynamic CMOS Array Logic) with modified clock scheme for the purpose of speed up and supporting RISC processor's pipelined architecture efficiently.

• Journal of Navigation and Port Research
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• v.47 no.2
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• pp.85-92
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• 2023

The hardware of an LED lighting control system for coastal lighting at coastal pier entrance consists of a power supply unit, an AVR control unit, a CLCD output unit, an LED control unit, a scenario selection switch unit, and an operation speed display unit. It is made of an 8-channel. The CPU used ATmega128 and the FET was used to control the current signal. To operate the CPU, DC 12V was converted to DC 5V using a regulator 7805. A heat sink was used to remove heat generated in the FET. By connecting the load LED module to the manufactured 8-channel LED lighting control system, the operation was confirmed through various production scenarios. In addition, a control system was designed to show the most suitable color for the atmosphere of the coastal pier according to the input value of temperature and illumination using a fuzzy control system. Computer simulation was then conducted. Results confirmed that fuzzy control did not need to store many data inputs due to characteristics of artificial intelligence and that it could efficiently represent many output values with simple fuzzy rules.

• Journal of Power Electronics
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• v.10 no.4
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• pp.434-443
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• 2010

A general purpose experimental set-up has been designed and implemented for students to carry out various experiments on inverters in the power electronics laboratories of universities, during a few hours of laboratory work. This is the first inverter setup that incorporates hardware and software control, as well as an optional user interface in a laboratory experimental set-up of a single multi-purpose inverter, thus making the system versatile and very practical for both undergraduate and graduate students. The system can be controlled either by a computer or through a liquid crystal display (LCD) and a keypad control unit, and it constitutes a low-cost alternative to relatively expensive commercial teaching sets. The computer provides a user friendly interface and easier control for laboratory environments equipped with computers. The LCD and keypad units eliminate the need for a computer, which makes this system usable in the laboratory as a standalone unit as well.

• IEIE Transactions on Smart Processing and Computing
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• v.1 no.3
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• pp.171-181
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• 2012

In the new video coding standard, called high efficiency video coding (HEVC), the coding unit (CU) is adopted as a basic unit of a coded block structure. Therefore, the rate control (RC) methods of H.264/AVC, whose basic unit is a macroblock, cannot be applied directly to HEVC. This paper proposes the largest CU (LCU) level RC method for hierarchical video coding in a HEVC. In the proposed method, the effective bit allocation is performed first based on the hierarchical structure, and the quantization parameters (QP) are then determined using the Cauchy density based rate-quantization (RQ) model. A novel method based on the linear rate model is introduced to estimate the parameters of the Cauchy density based RQ model precisely. The experimental results show that the proposed RC method not only controls the bitrate accurately, but also generates a constant number of bits per second with less degradation of the decoded picture quality than with the fixed QP coding and latest RC method for HEVC.

• Journal of Power Electronics
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• v.14 no.4
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• pp.733-741
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• 2014

The integration of photovoltaic (PV) energy sources into DC grid has gained considerable attention because of its enhanced conversion efficiency with reduced number of power conversion stages. During the integration process, a local control unit is normally included with every power conversion stage of the PV source to accomplish the process of maximum power point tracking. A centralized monitoring and supervisory control unit is required for monitoring, power management, and protection of the entire system. Therefore, we propose a field-programmable gate array (FPGA) based centralized control unit that integrates all local controllers with the centralized monitoring unit. The main focus of this study is on the process of integrating many local control units into a single central unit. In this paper, we present design and optimization procedures for the hardware implementation of FPGA architecture. Furthermore, we propose a transient analysis and control design methodology with consideration of the nonlinear characteristics of the PV source. Hardware experiment results verify the efficiency of the central control unit and controller design.