• Korean Security Journal
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• no.17
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• pp.195-220
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• 2008

Various Kinds of social pathology and crimes that threaten our daily safety are on the increase in process of time as a result of the development of science and technology empty of moral sense, Value Confusions, apolaustic tendency, economic and social transformation recently. Moreover the effective provision of police service lies beyond the boundaries of the police organization. Therefore private security personnel have made an effort for safety and protection of group as well as an individual through the introduction of private security industry based on a benefit principle and private security industry is being become complexes utilizing technology as well as high-end devices through various international events. The field of private security industry in Korea is being extended rapidly with expansionism of society and public services but the quality improvement is declining. Furthermore the study of recruit education program for security personnel as the basis of quality improvement is insufficient compared with the study of police service. Consequently, this investigation is going to contribute to development of recruit education program for security personnel through the analysis about difference of each subject usability for education about electronic security and facility guard.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.37 no.1
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• pp.27-33
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• 2013

To ensure proper functioning of electrical and mechanical systems, cooling devices are of great importance. A heat sink is the most common cooling device used in many industries such as the semiconductor, electronic instrument, LED lighting, and automotive industries. To design an optimal heat sink, the required surface area for heat radiation should be calculated based on an accurate expectation of the heat flow rate in the target environment. In this study, the convective heat flow characteristics were numerically investigated for a vertically installed typical heat sink and a horizontally installed one in free convection using ANSYS CFX. Comparative experiments were carried out to reveal the quantitative effect of the installation direction on the cooling performance. Moreover, the result was analyzed using the dimensionless correlation with the Nusselt number and Rayleigh number and compared with well-known theories. Finally, it was observed that the cooling performance of the vertically installed heat sink is approximately 10~15% better than that of the one in natural convection.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.207-207
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• 2011

Amorphous transparent oxide semiconductors (a-TOS) have been widely studied for many optoelectronic devices such as AM-OLED (active-matrix organic light emitting diodes). Recently, Nomura et al. demonstrated high performance amorphous IGZO (In-Ga-Zn-O) TFTs.1 Despite the amorphous structure, due to the conduction band minimum (CBM) that made of spherically extended s-orbitals of the constituent metals, an a-IGZO TFT shows high mobility.2,3 But IGZO films contain high cost rare metals. Therefore, we need to investigate the alternatives. Because Aluminum has a high bond enthalpy with oxygen atom and Alumina has a high lattice energy, we try to replace Gallium with Aluminum that is high reserve low cost material. In this study, we focused on the electrical properties of IZO:Al thin films as a channel layer of TFTs. IZO:Al were deposited on unheated non-alkali glass substrates (5 cm ${\times}$ 5 cm) by magnetron co-sputtering system with two cathodes equipped with IZO target and Al target, respectively. The sintered ceramic IZO disc (3 inch ${\phi}$, 5 mm t) and metal Al target (3 inch ${\phi}$, 5 mm t) are used for deposition. The O2 gas was used as the reactive gas to control carrier concentration and mobility. Deposition was carried out under various sputtering conditions to investigate the effect of sputtering process on the characteristics of IZO:Al thin films. Correlation between sputtering factors and electronic properties of the film will be discussed in detail.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.470-470
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• 2012

Organic thin film transistors (OTFTs) backplane constitute the active elements in new generations of plastic electronic devices for flexible display. The overall OTFTs performance is largely depended on the properties and quality of each layers of device material. In solution based process of organic semiconductors (OSCs), the interface state is most impediments to preferable performance. Generally, a threshold voltage (Vth) shift is usually exhibited when organic gate insulators (OGIs) are exposed in an ambient air condition. This phenomenon was caused by the absorbed polar components (i.e. oxygen and moisture) on the interface between OGIs and Soluble OSCs during the jetting process. For eliminating the polar component at the interface of OGI, the role of high vacuum seasoning on an OGI for all solution processable OTFTs were studied. Poly 4-vinly phenols (PVPs) were the material chosen as the organic gate dielectric, with a weakness in ambient air. The high vacuum seasoning of PVP's surface showed improved performance from non-seasoning TFT; a $V_{th}$, a ${\mu}_{fe}$ and a interface charge trap density from -8V, $0.018cm^2V^{-1}s^{-1}$, $1.12{\times}10^{-12}(cm^2eV)^{-1}$ to -4.02 V, $0.021cm^2V^{-1}s^{-1}$, $6.62{\times}10^{-11}(cm^2eV)^{-1}$. These results of OTFT device show that polar components were well eliminated by the high vacuum seasoning processes.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.562-562
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• 2012

Recently, graphene and graphene-based materials such as graphene oxide (GO) or reduced graphene oxide (R-GO) draws a great attention for electronic devices due to their structures of one atomic layer of carbon hexagon that have excellent mechanical, electrical, thermal, optical properties and very high specific surface area that can be high potential for chemical functionalization. R-GO is a promising candidate because it can be prepared with low-cost from solution process by chemical oxidation and exfoliation using strong acids and oxidants to produce graphene oxide (GO) and its subsequent reduction. R-GO has been used as semiconductor or conductor materials as well as sensing layer for bio-molecules or ions. In this work, reduced graphene oxide field-effect transistor (R-GO FET) has been fabricated with ITO extended gate structure that has sensing area on ITO extended gate part. R-GO FET device was encapsulated by tetratetracontane (TTC) layer using thermal evaporation. A thermal annealing process was carried out at $140^{\circ}C$ for 4 hours in the same thermal vacuum chamber to remove defects in R-GO film before deposition of TTC at $50^{\circ}C$ with thickness of 200 nm. As a result of this process, R-GO FET device has a very high stability and durability for months to serve as a transducer for sensing applications.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.580-580
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• 2012

Heterostructures has unique and important properties, which may be helpful for finding many potential applications in the field of electronic, thermoelectric, and optoelectronic devices. We synthesized CdTe/Te core-shell heterostructures by vapor-solid process at low temperatures using a quartz tube furnace. Two step vapor-solid processes were employed. First, various tellurium structures such as nanowires, nanorods, nanoneedles, microtubes and microrods were synthesized under various deposition conditions. These tellurium nanostructures were then used as substrates in the second step to synthesize the CdTe/Te core-shell heterostructures. Using this method, various sizes, shapes and types of CdTe/Te core-shell structures were fabricated under a range of conditions. These structures were analysed by scanning electron microscopy, high resolution transmission electron microscopy, and energy dispersive x-ray spectroscopy. The vapor phase process at low temperatures appears to be an efficient method for producing a variety of Cd/Te hetero-nanostructures. In addition, the hetero-nanostructures can be tailored to the needs of specific applications by deliberately controlling the synthetic parameters.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.196-196
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• 2012

Graphene, two-dimensional one-atom-thick planar sheet of carbon atoms densely packed in a honeycomb crystal lattice, has grabbled appreciable attention due to its extraordinary mechanical, thermal, electrical, and optical properties. Based on the graphene's high carrier mobility, high frequency graphene field effect transistors have been developed. Graphene is useful for photonic components as well as for the applications in electronic devices. Graphene's unique optical properties allowed us to develop ultra wide-bandwidth optical modulator, photo-detector, and broadband polarizer. Graphene can support SPP-like surface wave because it is considered as a two-dimensional metal-like systems. The SPPs are associated with the coupling between collective oscillation of free electrons in the metal and electromagnetic waves. The charged free carriers in the graphene contribute to support the surface waves at the graphene-dielectric interface by coupling to the electromagnetic wave. In addition, graphene can control the surface waves because its charge carrier density is tunable by means of a chemical doping method, varying the Fermi level by applying gate bias voltage, and/or applying magnetic field. As an extended application of graphene in photonics, we investigated the characteristics of the graphene-based plasmonic waveguide for optical signal transmission. The graphene strips embedded in a dielectric are served as a high-frequency optical signal guiding medium. The TM polarization wave is transmitted 6 mm-long graphene waveguide with the averaged extinction ratio of 19 dB at the telecom wavelength of $1.31{\mu}m$. 2.5 Gbps data transmission was successfully accomplished with the graphene waveguide. Based on these experimental results, we concluded that the graphene-based plasmonic waveguide can be exploited further for development of next-generation integrated photonic circuits on a chip.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.72-72
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• 2011

Recently, Zinc oxide (ZnO) nano-structures have been received attractive attention because of their outstanding optical and electrical properties. It might be a promising material considered for applications to photonic and electronic devices such as ultraviolet light emitting diode, thin film transistor, and gas sensors. ZnO nano-structures can be typically synthesized by the VLS growth mode and self-assembly. In the VLS growth mode using various growth techniques, the noble metal catalysts such as Au and Sn were used. However, the growth of ZnO nano-structures on nano-crystalline Au seeds using radio frequency (RF) magnetron sputtering might be explained by the profile coating, i.e. the ZnO nano-structures were a morphological replica of Au seeds. Ga doped ZnO (ZnO:Ga) nano-structures using this concept were synthesized and characterized by XRD, AFM, SEM, and TEM. We found that surface morphology is drastically changed from initial islands to later sun-flower typed nano-structures. We will present the structural evolution of ZnO:Ga nano-structures with increasing the film thickness.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.479-479
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• 2011

Flexible inverters based on complementary thin-film transistor (CTFTs) are important because they have low power consumption and other advantages over single type TFT inverters. In addition, integrated CTFTs in flexible electronic circuits on low-cost, large area and mechanically flexible substrates have potentials in various applications such as radio-frequency identification tags (RFIDs), sensors, and backplanes for flexible displays. In this work, we introduce flexible complementary inverters using pentacene and amorphous indium gallium zinc oxide (IGZO) for the p-channel and n-channel, respectively. The CTFTs were fabricated on polyimide (PI) substrate. Firstly, a thin poly-4-vinyl phenol (PVP) layer was spin coated on PI substrate to make a smooth surface with rms surface roughness of 0.3 nm, which was required to grow high quality IGZO layers. Then, Ni gate electrode was deposited on the PVP layer by e-beam evaporator. 400-nm-thick PVP and 20-nm-thick ALD Al2O3 dielectric was deposited in sequence as a double gate dielectric layer for high flexibility and low leakage current. Then, IGZO and pentacene semiconductor layers were deposited by rf sputter and thermal evaporator, respectively, using shadow masks. Finally, Al and Au source/drain electrodes of 70 nm were respectively deposited on each semiconductor layer using shadow masks by thermal evaporator. Basic electrical characteristics of individual transistors and the whole CTFTs were measured by a semiconductor parameter analyzer (HP4145B, Agilent Technologies) at room temperature in the dark. Performance of those devices then was measured under static and dynamic mechanical deformation. Effects of cyclic bending were also examined. The voltage transfer characteristics (Vout- Vin) and voltage gain (-dVout/dVin) of flexible inverter circuit were analyzed and the effects of mechanical bending will be discussed in detail.

• Proceedings of the Materials Research Society of Korea Conference
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• 2012.05a
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• pp.88.1-88.1
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• 2012

Silicon nanowires (SiNWs), due to their unusual quantum-confinement effects that lead to superior electrical and optical properties compared to those of the bulk silicon, have been widely researched as a potential building block in a variety of novel electronic devices. The conventional means for the synthesis of SiNWs has been the vapor-liquid-solid method using chemical vapor deposition; however, this method is time consuming, environmentally unfriendly, and do not support vertical growth. As an alternate, the electroless etching method has been proposed, which uses metal catalysts contained in aqueous hydrofluoric acids (HF) for vertically etching the bulk silicon substrate. This new method can support large-area growth in a short time, and vertically aligned SiNWs with high aspect ratio can be readily synthesized with excellent reproducibility. Nonetheless, there still are rooms for improvement such as the poor surface characteristics that lead to degradation in electrical performance, and non-uniformity of the diameter and shapes of the synthesized SiNWs. Here, we report a facile method of SiNWs synthesis having uniform sizes, diameters, and shapes, which may be other than just cylindrical shapes using a modified nanosphere lithography technique. The diameters of the polystyrene nanospheres can be adjustable through varying the time of O2 plasma treatment, which serve as a mask template for metal deposition on a silicon substrate. After the removal of the nanospheres, SiNWs having the exact same shape as the mask are synthesized using wet etching technique in a solution of HF, hydrogen peroxide, and deionized water. Different electrical and optical characteristics were obtained according to the shapes and sizes of the SiNWs, which implies that they can serve specific purposes according to their types.