• Title/Summary/Keyword: Electronic devices

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Electrical Properties and Luminous Efficiency in Organic Light-Emitting Diodes Depending on Buffer Layer and Cathodes (버퍼층과 음전극에 따른 유기 발광 소자의 전기적 특성과 발광 효율)

  • 정동회;김상걸;홍진웅;이준웅;김태완
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.5
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    • pp.409-417
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    • 2003
  • We have studied electrical properties and luminous efficiency of organic light-emitting diodes(OLEDs) with different buffer layer and cathodes in a temperature range of 10 K and 300 K. Four different device structures were made. The OLEDs are based on the molecular compounds, N,N'-diphenyl-N,N'-bis(3-methylphenyl)-1,1'-biphenyl-4,4'-diamine (TPD) as a hole transport, tris(8-hydroxyquinolinato) aluminum(III) (Alq$_3$) as an electron transport and omissive layer, and poly(3,4-ethylenedioxythiophene) :poly (styrenesulfonate) (PEDOT:PSS ) as a buffer layer. And LiAl was used as a cathode. Among the devices, the ITO/PEDOT:PSS/TPD/Alq$_3$/LiAl structure has a low energy-barrier height for charge injection and show a good luminous efficiency. We have got a highly efficient and low-voltage operating device using the conductive PEDOT:PSS and low work-function LiAl. From current-voltage characteristics with temperature variation, conduction mechanisms are explained SCLC (space charge limited current) and tunneling one. We have also studied energy barrier height and luminous efficiency at various temperature.

Studies for Improvement in SiO2 Film Property for Thin Film Transistor (박막트랜지스터 응용을 위한 SiO2 박막 특성 연구)

  • Seo, Chang-Ki;Shim, Myung-Suk;Yi, Junsin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.17 no.6
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    • pp.580-585
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    • 2004
  • Silicon dioxide (SiO$_2$) is widely used as a gate dielectric material for thin film transistors (TFT) and semiconductor devices. In this paper, SiO$_2$ films were grown by APCVD(Atmospheric Pressure chemical vapor deposition) at the high temperature. Experimental investigations were carried out as a function of $O_2$ gas flow ratios from 0 to 200 1pm. This article presents the SiO$_2$ gate dielectric studies in terms of deposition rate, refrative index, FT-IR, C-V for the gate dielectric layer of thin film transistor applications. We also study defect passivation technique for improvement interface or surface properties in thin films. Our passivation technique is Forming Gas Annealing treatment. FGA acts passivation of interface and surface impurity or defects in SiO$_2$ film. We used RTP system for FGA and gained results that reduced surface fixed charge and trap density of midgap value.

Formation of ITO Ohmic Contact to ITO/n+lnP for III-V Optoelectronic Devices (III-V 광소자 제작을 위한 ITO/n+lnP 옴 접촉 특성연구)

  • 황용한;한교용
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.15 no.5
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    • pp.449-454
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    • 2002
  • The use of a thin film of indium between the ITO and the $n^+-lnP$ contact layers for InP/InGaAs HPTs was studied without degrading its excellent optical transmittance properties. $ITO/n^+-lnP$ ohmic contact was successfully achieved by the deposition of indium and annealing. The specific contact resistance of about $6.6{\times}10^{-4}\Omega\textrm{cm}^2$ was measured by use of the transmission line method (TLM). However, as the thermal annealing was just performed to $ITO/n^+-lnP$ contact without the deposition of indium between ITO and $n^+-lnP$, it exhibited Schottky characteristics. In the applications, the DC characteristics of InP/InGaAs HPTs with ITO emitter contacts was compared with those of InP/InGaAs HBTs with the opaque emitter contacts.

Fabrication and Properties of MFISFET using SrBi2Ta2O9SiN/Si Structures (SrBi2Ta2O9SiN/Si 구조를 이용한 MFISFET의 제작 및 특성)

  • 김광호
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.15 no.5
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    • pp.383-387
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    • 2002
  • N-channel metal-ferroelectric-insulator-semiconductor field-effect-transistors (MFISFET's) by using $SrBi_2Ta_2O_9$/Silicon Nitride/Si (100) structure were fabricated. The fabricated devices exhibit comfortable memory windows, fast switching speeds, good fatigue resistances, and long retention times that are suitable for advanced ferroelectric memory applications. The estimated switching time and polarization ($2P_r$) of the fabricated FET measured at applied electric field of 376 kV/cm were less than 50 ns and about 1.5 uC/$\textrm{cm}^2$, respectively. The magnitude of on/off ratio indicating the stored information performance was maintained more than 3 orders until 3 days at room temperature. The $I_DV_G$ characteristics before and after being subjected to $10^11$ cycles of fatigue at a frequency of 1 MHz remained almost the same except a little distortion in off state.

Static and Transient Simulation of High Power IGCT Devices (대용량 IGCT 소자의 정상상태 및 과도상태 특성 해석)

  • Kim, Sang-Cheol;Kim, Hyung-Woo;Kim, Eun-Dong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.05c
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    • pp.213-216
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    • 2003
  • Recently a new high power device GCT (Gate Commutated Turn-off) thyristor has been successfully introduced to high power converting application areas. GCT thyristor has a quite different turn-off mechanism to the GTO thyristor. All main current during turn-off operation is commutated to the gate. Therefore, IGCT thyristor has many superior characteristics compared with GTO thyristor; especially, snubberless tum-off capacibility and higher turn-on capacibility. The basic structure of the GeT thyristor is same as that of the GTO thyristor. This makes the blocking voltage higher and controllable on-state current higher. The turn-off characteristic of the GCT thyristor is influenced by the minority carrier lifetime and the performance of the gate drive unit. In this paper, we present turn-off characteristics of the 2.5kV PT(Punch-Through) type GCT as a function of the minority carrier lifetime and variation of the doping profile shape of p-base region.

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Study on the Optimization of HSS STI-CMP Process (HSS STI-CMP 공정의 최적화에 관한 연구)

  • Jeong, So-Young;Seo, Yong-Jin;Park, Sung-Woo;Kim, Chul-Bok;Kim, Sang-Yong;Lee, Woo-Sun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.05c
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    • pp.149-153
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    • 2003
  • Chemical mechanical polishing (CMP) technology for global planarization of multi-level inter-connection structure has been widely studied for the next generation devices. CMP process has been paid attention to planarized pre-metal dielectric (PMD), inter-layer dielectric (ILD) interconnections. Expecially, shallow trench isolation (STI) used to CMP process on essential. Recently, the direct STI-CMP process without the conventional complex reverse moat etch process has established by using slurry additive with the high selectivity between $SiO_2$ and $Si_3N_4$ films for the purpose of process simplification and n-situ end point detection(EPD). However, STI-CMP process has various defects such as nitride residue, tom oxide and damage of silicon active region. To solve these problems, in this paper, we studied the planarization characteristics using a high selectivity slurry(HSS). As our experimental results, it was possible to achieve a global planarization and STI-CMP process could be dramatically simplified. Also we estimated the reliability through the repeated tests with the optimized process conditions in order to identify the reproducibility of HSS STI-CMP process.

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Determining the Self-Assembly and Redox Process of a Viologen Monolayer by Electrochemical Quartz Crystal Microbalance (수정진동자를 이용한 Viologen 단분자막의 자기조립화와 산화,환원 반응 측정)

  • Ock, J.Y.;Song, S.H.;Shin, H.K.;Chang, J.S.;Chang, S.M.;Kwon, Y.S.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.05c
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    • pp.23-27
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    • 2003
  • Molecular self-assembled of surfactant viologen are of recent interest because they can from functional electrodes as well as micellar assemblies, which can be profitably utilized for display devices, photoelectrochemical studies and electrocatalysis as electron acceptor or electron mediator. Fromherz et al studied the self-assembly of thiol and disulfide derivatives of viologens bearing long n-alkyl chains on Au electrode surface. The electrochemical behavior of self-assembled viologen monolayer has been investigated with QCM, which has been known as nano-gram order mass detector. The self-assembly process of viologen was monitored using resonant frequency$({\Delta}F)$ and resonant resistance(R). The redox process of viologen was observed with resonant frequency $({\Delta}F)$.

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A study of piezoelectric element for AE sensor using PZT ceramics (PZT세라믹을 이용한 AE센서의 압전소자 연구)

  • Kwon, O.D.;Yun, Y.J.;Yoo, J.S.;Kang, S.H.;Lim, K.J.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.05b
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    • pp.173-176
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    • 2004
  • The piezoelectric ceramics for AE sensor piezoelectric devices are desirable to possess higher resonance vibrations. The compositions of $0.9Pb(Zr_xTi_{1-x})O_3-0.1Pb(Mn_{1/3}Nb_{1/3}Sb_{1/3})O_3$ (PZT-PMNS) in this work are selected for obtaining especially large electromechanical coupling factor, high mechanical quality factor and high Curie temperature. This ceramic has higher piezoelectric activity and higher electromechanical coupling factor, but the ceramic has lower Curie temperature. The piezoelectric and dielectric characteristics of PZT-PMNS ternary system are investigated as functions of $Ti^{2+}$, $Zi^{2+}$ mol rate. As the results, MPB(morphotropic phase boundary) in this piezoelectric ceramic is x=0.522. Resonance vibrations of PZT ceramics are investigated as ball-bearing drop test. For the use of AE sensor that driving with pre-amplifier, filter circuit after packed this ceramic and an elastic body.

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UPFC Device: Optimal Location and Parameter Setting to Reduce Losses in Electric-Power Systems Using a Genetic-algorithm Method

  • Mezaache, Mohamed;Chikhi, Khaled;Fetha, Cherif
    • Transactions on Electrical and Electronic Materials
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    • v.17 no.1
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    • pp.1-6
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    • 2016
  • Ensuring the secure operation of power systems has become an important and critical matter during the present time, along with the development of large, complex and load-increasing systems. Security constraints such as the thermal limits of transmission lines and bus-voltage limits must be satisfied under all of a system’s operational conditions. An alternative solution to improve the security of a power system is the employment of Flexible Alternating-Current Transmission Systems (FACTS). FACTS devices can reduce the flows of heavily loaded lines, maintain the bus voltages at desired levels, and improve the stability of a power network. The Unified Power Flow Controller (UPFC) is a versatile FACTS device that can independently or simultaneously control the active power, the reactive power and the bus voltage; however, to achieve such functionality, it is very important to determine the optimal location of the UPFC device, with the appropriate parameter setting, in the power system. In this paper, a genetic algorithm (GA) method is applied to determine the optimal location of the UPFC device in a network for the enhancement of the power-system loadability and the minimization of the active power loss in the transmission line. To verify our approach, simulations were performed on the IEEE 14 Bus, 30 Bus, and 57 Bus test systems. The proposed work was implemented in the MATLAB platform.

Optical Properties Control by Surface Treatment on Display Cover Glass (디스플레이 커버 글라스의 표면 처리에 의한 광학요소 제어)

  • Kim, Sung Soo;Hwang, Jai Suk;Jeon, Bup Ju
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.28 no.9
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    • pp.607-614
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    • 2015
  • To provide the clear images from the direct light on electrical board and display devices, anti glare treatment of display cover glass is needed. In this study, the effects of surface treatment temperature, concentration, and etching solution coating thickness of the gel phase on optical elements control such as gloss, haze of reflected light and transmittance, were investigated. Cover glasses were treated at different coating thickness and additive concentration. The optical properties were examined using spectrophotometer, gloss and haze meter. The surface morphology and roughness were measured by the optical microscope and Ra measuring instrument. The etching rate and surface morphologies were dramatically affected by the concentration of acid additive in the viscous gel because of re-crystallization of components in the etching solution, hydrogel formation and coagulant after coating on glass substrate. In our experimental range, cover glass which is surface-treated with various optical properties as well as the morphology uniformity was obtained; in particular, optical properties could be controlled by etching solution coating thickness of the gel phase and the concentration of additive. The gloss was depended on the surface roughness and it showed the linear relationship between optical transmittance and haze of reflected light, respectively.