• Title/Summary/Keyword: Electronic devices

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Adaptive Beamforming System Architecture Based on AOA Estimator (AOA 추정기 기반의 적응 빔형성 시스템 구조)

  • Mun, Ji-Youn;Bae, Young-Chul;Hwang, Suk-Seung
    • The Journal of the Korea institute of electronic communication sciences
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    • v.12 no.5
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    • pp.777-782
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    • 2017
  • The Signal Intelligence (SIGINT) system based on the adaptive beamformer, comprised of the AOA estimator followed by the interference canceller, is a cutting edge technology for collecting various signal information utilizing all sorts of devices such as the radar and satellite. In this paper, we present the efficient adaptive SIGINT structure consisted of an AOA estimator and an adaptive beamformer. For estimating AOA information of various signals, we employ the Multiple Signal Classification (MUSIC) algorithm and for efficiently suppressing high-power interference signals, we employ the Minimum Variance Distortionless Response (MVDR) algorithm. Also, we provide computer simulation examples to verify the performance of the presented adaptive beamformer structure.

The Change of I-V Characteristics by Gate Voltage Stress on Few Atomic Layered MoS2 Field Effect Transistors (수 원자층 두께의 MoS2 채널을 가진 전계효과 트랜지스터의 게이트 전압 스트레스에 의한 I-V 특성 변화)

  • Lee, Hyung Gyoo;Lee, Gisung
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.31 no.3
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    • pp.135-140
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    • 2018
  • Atomically thin $MoS_2$ single crystals have a two-dimensional structure and exhibit semiconductor properties, and have therefore recently been utilized in electronic devices and circuits. In this study, we have fabricated a field effect transistor (FET), using a CVD-grown, 3 nm-thin, $MoS_2$ single-crystal as a transistor channel after transfer onto a $SiO_2/Si$ substrate. The $MoS_2$ FETs displayed n-channel characteristics with an electron mobility of $0.05cm^2/V-sec$, and a current on/off ratio of $I_{ON}/I_{OFF}{\simeq}5{\times}10^4$. Application of bottom-gate voltage stresses, however, increased the interface charges on $MoS_2/SiO_2$, incurred the threshold voltage change, and degraded the device performance in further measurements. Exposure of the channel to UV radiation further degraded the device properties.

E-mail Header-Based Search and Seizure for Internet Portal Digital Forensics (포털 전자메일 압수수색을 위한 메일헤더기반 디지털포렌식)

  • Lee, Hae-Jin;Shon, Tae-Shik
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.28 no.5
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    • pp.1129-1140
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    • 2018
  • In accordance with the spread of the Internet and the development of various digital devices, the amount of electronic information is rapidly increasing. Selection of electronic information seizure searches continues to increase for third parties, such as portal sites e-mails that persons do not possess directly from the electronic information, and it is also used as evidence in court. However, the current method of searching for houses has many problems such as the absence of notice of seizure search result, seizure searches are proceeded indiscriminately against whole e-mail after calculating only during the seizure period, and seizure search procedure And presented the improvement points.

The Variation of Response on Humidity in CNT Thin Film by Silane Binders (실란 바인더에 의한 탄소나노튜브 박막의 감습 특성 변화)

  • Kim, Seong-Jeen
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.23 no.10
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    • pp.782-787
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    • 2010
  • Recently the solution-based thin film technology has often been treated in the field of device fabrication owing to easy process and convenience for the development of various semiconductor devices and sensors. We deposited on glass substrate single-walled carbon nanotubes (SWNTs)/silane hybrid thin films by multiple spray-coating which is one of solution-based processes, and examined their electrical response for humidity. Generally silane binders which are often mixed in carbon nanotube (CNT) solution to adhere CNTs to substrate well form easily each own functionalized group on the surface of CNTs after they are hardened by way of the hydrolysis reaction. In this work, we investigated how silane binders (TEOS (tetraethoxy silane), MTMS (methyltrimethoxysilane) and VTMS (vinyltrimethoxysilane)) in CNT thin films make effect to their electrical response on humidity. As the result, we found that the resistance in the samples using TEOS was changed dramatically while it was almost invariant in the samples using MTMS and VTMS for increasing humidity.

Integrated Circuit Design Based on Carbon Nanotube Field Effect Transistor

  • Kim, Yong-Bin
    • Transactions on Electrical and Electronic Materials
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    • v.12 no.5
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    • pp.175-188
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    • 2011
  • As complementary metal-oxide semiconductor (CMOS) continues to scale down deeper into the nanoscale, various device non-idealities cause the I-V characteristics to be substantially different from well-tempered metal-oxide semiconductor field-effect transistors (MOSFETs). The last few years witnessed a dramatic increase in nanotechnology research, especially the nanoelectronics. These technologies vary in their maturity. Carbon nanotubes (CNTs) are at the forefront of these new materials because of the unique mechanical and electronic properties. CNTFET is the most promising technology to extend or complement traditional silicon technology due to three reasons: first, the operation principle and the device structure are similar to CMOS devices and it is possible to reuse the established CMOS design infrastructure. Second, it is also possible to reuse CMOS fabrication process. And the most important reason is that CNTFET has the best experimentally demonstrated device current carrying ability to date. This paper discusses and reviewsthe feasibility of the CNTFET's application at this point of time in integrated circuits design by investigating different types of circuit blocks considering the advantages that the CNTFETs offer.

Growth Characteristics of the ZnO Nanowires Prepared by Hydrothermal Synthesis Technique with Applied DC Bias (DC 바이어스를 인가하여 수열합성법으로 성장시킨 ZnO 나노와이어의 성장 특성)

  • Lim, Young-Taek;Shin, Paik-Kyun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.27 no.5
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    • pp.317-321
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    • 2014
  • Hydrothermal synthesis technique could be carried out for growth of ZnO nanowires at relatively low process temperature, and it could be freely utilized with various substrates for fabrication process of functional electronic devices. However, it has also a demerit of relatively slow growth characteristics of the resulting ZnO nanowires. In this paper, an external DC bias of positive and negative 0.5 [V] was applied in the hydrothermal synthesis process for 2~8 [h] to prepare ZnO nanowires on a seed layer of AZO with high electrical conductivity. Growth characteristics of the synthesized ZnO nanowires were analyzed by FE-SEM. Material property of the grown ZnO nanowires was examined by PL analysis. The ZnO nanowires grown with positive bias revealed distinctively enhanced growth characteristics, and they showed a typical material property of ZnO.

Controllability of Structural, Optical and Electrical Properties of Ga doped ZnO Nanowires Synthesized by Physical Vapor Deposition

  • Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.14 no.3
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    • pp.148-151
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    • 2013
  • The control of Ga doping in ZnO nanowires (NWs) by physical vapor deposition has been implemented and characterized. Various Ga-doped ZnO NWs were grown using the vapor-liquid-solid (VLS) method, with Au catalyst on c-plane sapphire substrate by hot-walled pulsed laser deposition (HW-PLD), one of the physical vapor deposition methods. The structural, optical and electrical properties of Ga-doped ZnO NWs have been systematically analyzed, by changing Ga concentration in ZnO NWs. We observed stacking faults and different crystalline directions caused by increasing Ga concentration in ZnO NWs, using SEM and HR-TEM. A $D^0X$ peak in the PL spectra of Ga doped ZnO NWs that is sharper than that of pure ZnO NWs has been clearly observed, which indicated the substitution of Ga for Zn. The electrical properties of controlled Ga-doped ZnO NWs have been measured, and show that the conductance of ZnO NWs increased up to 3 wt% Ga doping. However, the conductance of 5 wt% Ga doped ZnO NWs decreased, because the mean free path was decreased, according to the increase of carrier concentration. This control of the structural, optical and electrical properties of ZnO NWs by doping, could provide the possibility of the fabrication of various nanowire based electronic devices, such as nano-FETs, nano-inverters, nano-logic circuits and customized nano-sensors.

Electrochemical Properties of EDLC Electrodes with Diverse Graphene Flake Sizes (그래핀 플레이크 크기에 따른 전기 이중층 커패시터용 전극의 전기화학적 특성)

  • Yu, Hye-Ryeon
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.31 no.2
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    • pp.112-116
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    • 2018
  • Electric double layer capacitors (EDLCs) are promising candidates for energy storage devices in electronic applications. An EDLC yields high power density but has low specific capacitance. Carbon material is used in EDLCs owing to its large specific surface area, large pore volume, and good mechanical stability. Consequently, the use of carbon materials for EDLC electrodes has attracted considerable research interest. In this paper, in order to evaluate the electrochemical performance, graphene is used as an EDLC electrode with flake sizes of 3, 12, and 60 nm. The surface characteristic and electrochemical properties of graphene were investigated using SEM, BET, and cyclic voltammetry. The specific capacitance of the graphene based EDLC was measured in a 1 M $TEABF_4/ACN$ electrolyte at the scan rates of 2, 10, and 50 mV/s. The 3 nm graphene electrode had the highest specific capacitance (68.9 F/g) compared to other samples. This result was attributed to graphene's large surface area and meso-pore volume. Therefore, large surface area and meso-pore volume effectively enhances the specific capacitance of EDLCs.

RSA-Based Enhanced Partially Blind Signature Algorithm Minimizing Computation Of The Signature Requester (서명 요청자의 계산량을 감소시키는 RSA에 기반한 개선된 부분은닉서명 알고리즘)

  • Kwon, Moon-Sang;Cho, Yoo-Kun
    • Journal of KIISE:Computer Systems and Theory
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    • v.29 no.5
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    • pp.299-306
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    • 2002
  • Partially blind signature scheme is used in applications such as electronic cash and electronic voting where the privacy of the signature requester is important. This paper proposes an RSA-based enhanced partially blind signature scheme minimizing the amount of computation of the signature requester. The signature requester needs computation in blinding the message to the signer and in generating the final signature using the intermediate signature generated by the signer. Since the proposed scheme enables the signature requester to get the final signature just by using modular additions and multiplications, it decreases computation of the signature requester considerably. So, the proposed partially blind signature scheme is adequate for devices such as mobile device, smart-card, and electronic purse that have relatively low computing power.

Cascaded Multi-Level Inverter Based IPT Systems for High Power Applications

  • Li, Yong;Mai, Ruikun;Yang, Mingkai;He, Zhengyou
    • Journal of Power Electronics
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    • v.15 no.6
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    • pp.1508-1516
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    • 2015
  • A single phase H-bridge inverter is employed in conventional Inductive Power Transfer (IPT) systems as the primary side power supply. These systems may not be suitable for some high power applications, due to the constraints of the power electronic devices and the cost. A high-frequency cascaded multi-level inverter employed in IPT systems, which is suitable for high power applications, is presented in this paper. The Phase Shift Pulse Width Modulation (PS-PWM) method is proposed to realize power regulation and selective harmonic elimination. Explicit solutions against phase shift angle and pulse width are given according to the constraints of the selective harmonic elimination equation and the required voltage to avoid solving non-linear transcendental equations. The validity of the proposed control approach is verified by the experimental results obtained with a 2kW prototype system. This approach is expected to be useful for high power IPT applications, and the output power of each H-bridge unit is identical by the proposed approach.