• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.05c
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• pp.170-173
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• 2003

In this paper, we proposed a new bulk LDMOS structure which can be used for RF application, and its fabrication steps were introduced. The simulated devices consist of three types: Bulk device, SLB(SOI Like Bulk), and SOI device. As a result of process and device simulation, we showed electrical characteristics, such as threshold voltage, subthreshold slope, DIBL(Drain Induced Barrier Lowering), off-state current, and breakdown voltage. In this simulation study, the lattice temperature model was adopted to see the device characteristics with lattice temperature during the operation. SLB device structure showed the best breakdown characteristics among the other structures. The breakdown voltage of SLB structure is about 9V, that of bulk is 7V, and that of SOI is 8V.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.05c
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• pp.95-98
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• 2003

Tin doped indium oxide(ITO) films, which is widely used as a transparent conductor in optoelectronic devices such as solar cell, liquid crystal display, plasma display panel, thermal heater, and other sensors, were prepared by using the capacitively coupled DC magnetron sputtering method. The influence of the substrate temperature, working gas pressure and deposition time on the electrical, optical and morphological properties were investigated experimentally. ITO films with the optimum growth conditions showed resistivity of $2.36{\times}10^{-4}(\Omega}-cm$ and transmittance of 86.28% for a film 680nm thick in the wavelength range of the visible spectrum.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.6
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• pp.602-607
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• 2004

This paper describes the characteristics of Ru-Zr alloy gate electrodes deposited by co-sputtering. The various atomic composition was made possible by controlling sputtering power of Ru and Zr. Thermal stability was examined through 600 and 700 $^{\circ}C$ RTA annealing. Variation of oxide thickness and X-ray diffraction(XRD) pattern after annealing were employed to determine the reaction at interface. Low and relatively stable sheet resistances were observed for Ru-Zr alloy after annealing. Electrical properties of alloy film were measured from MOS capacitor and specific atomic composition of Zr and Ru was found to yield compatible work function for nMOS. Ru-Zr alloy was stable up to $700^{\circ}C$ while maintaining appropriate work function and oxide thickness.

• Transactions on Electrical and Electronic Materials
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• v.17 no.1
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• pp.50-55
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• 2016

In this paper, we have analyzed the electrical characteristics of 1200V trench gate field stop IGBT and have compared to NPT planar type IGBT and NPT planar field stop IGBT. As a result of analyzing, we obtained superior electrical characteristics of trench gate field stop IGBT than conventional IGBT. To begin with, the breakdown voltage characteristic was showed 1,460 V and on state voltage drop was showed 0.7 V. We obtained 3.5 V threshold voltage, too. To use these results, we have extracted optimal design and process parameter and designed trench gate field stop IGBT. The designed trench gate IGBT will use to inverter of renewable energy and automotive industry.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.9
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• pp.551-554
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• 2015

This paper was analyzed electrical characteristics of super junction IGBT with super junction field rings. As a result of super junction IGBT with super junction field rings, we obtained 3,300 V breakdown voltage and good thermal characteristics. we obtained shrinked chip size because field ring was decreased than field ring for conventional IGBT, too. And we fabricated super junction IGBT with super junction field rings. As a result of measuring fabricated chip, we obtained 3,300 V breakdown voltage. The fabricated devices were replaced thyristos using high voltage conversion, sufficiently.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.9
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• pp.710-712
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• 2011

In this study, we fabricate resistive switching random access memory (ReRAM) devices constructed with a Al/$HfO_2$/ITO structure on glass substrates and investigate their memory characteristics. The hafnium oxide thin film used as a resistive switching layer is sputtered at room temperature in a sputtering system with a cooling unit. The Al/$HfO_2$/ITO device exhibits bipolar resistive switching characteristics, and the ratio of the high resistance (HRS) to low resistance states (LRS) is more than 60. In addition, the resistance ratio maintains even after $10^4$ seconds.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.9
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• pp.713-717
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• 2011

This paper was carried out design of 600 V GaN power MOSFET Modeling. We decided trench gate type one for design. we carried out device and process simulation with T-CAD tools. and then, we have extracted optimal device and process parameters for fabrication. we have analysis electrical characteristics after simulations. As results, we obtained 600 V breankdown voltage and $0.4\;m{\Omega}cm^2ultra$ low on resistance. At the same time, we carried out field ring simulation for obtaining high voltage.

• Transactions on Electrical and Electronic Materials
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• v.12 no.1
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• pp.16-19
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• 2011

The oxide-nitride-oxide (ONO) deposition process was added to the beginning of a 0.25 ${\mu}m$ embedded polysiliconoxide-nitride-oxide-silicon (SONOS) process before all of the logic well implantation processes in order to maintain the characteristics of basic CMOS(complementary metal-oxide semiconductor) logic technology. The system subsequently suffered severe ONO rupture failure. The damage was caused by the ONO implantation and was responsible for the ONO rupture failure in the embedded SONOS process. Furthermore, based on the experimental results as well as an implanted ion's energy loss model, processes primarily producing permanent displacement damages responsible for the ONO rupture failure were investigated for the embedded SONOS process.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.2
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• pp.124-127
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• 2010

We have fabricated organic white light emitting device by two colors from yellow fluorescence material (5,6,11,12)-Tetraphenylnaphthacene(Rubrene) and blue phosphorescent material (iridum-bis(4,6-difluorophenylpyridinato-N,C2)-picolinate(FIrpic). The threshold voltage is 5.3 V, and the brightness reaches 1000 cd/$m^2$ at 11 V, 14.5 mA/$m^2$. The color of the light corresponds to a CIE coordinate of (0.30, 0.38). The highest efficiency of the device can reach 9.5 cd/A or 5.5 lm/W at 6 V, 0.1 mA/$m^2$.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.8
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• pp.501-504
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• 2014

This paper was developed and described core-process to implement low on resistance which was the most important characteristics of SJ (super junction) MOSFET. Firstly, using process-simulation, SJ MOSFET optimal structure was set and developed its process flow chart by repeated simulation. Following process flow, gate level process was performed. And source and drain level process was similar to genral planar MOSFET, so the process was the same as the general planar MOSFET. And then to develop deep trench process which was main process of the whole process, after finishing photo mask process, we developed deep trench process. We expected that developed process was necessary to develop SJ MOSFET for automobile semiconductor.