• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.1424-1427
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• 2005

In this paper, we studied on the application of Organic Thin Film Transistors (OTFTs) to the active matrix organic light emitting diodes (AMOLED). We designed organic transistor based pixel circuits for AMOLED. The pixel circuit is consisted of two-transistor, one-capacitor and one-OLED. We report the simulation results of the pixel circuits that OLED current varied as the data line and scan line voltage. Also, we will describe the fabrication process of the Pentacene OTFTs arrays and the organic light emitting diodes. The driving results of the fabricated unit pixels and their 4x4 arrays are also presented.

• Proceedings of the IEEK Conference
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• 2000.07b
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• pp.986-989
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• 2000

The traditional method to construct Geographic Information System (GIS) is to scan the published maps, then the important and difficult step is to digitize the maps data. It costs a lot of time and human resource. Because a Global Positioning System (GPS) can offer high accurate digital signal directly, we developed a new method that uses the GPS to construct the GIS.

• Proceedings of the Korea Information Processing Society Conference
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• 2002.04b
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• pp.1635-1638
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• 2002

IEEE Std.1149.1 표준의 제정으로 경계주사는 규격화되었다. 그러나 이러한 표준의 제정에도 불구하고 실제 보드 테스트를 수행하는 데에는 아직도 많은 어려움을 가지고 있다. 본 연구에서는 IEEE Std.1149.1의 표준을 만족하면서도 기존의 방법보다 안전성에서 우위를 보임과 동시에 보다 높은 고장 검출률을 가지는 경계주사 테스트 시스템의 새로운 구현 기법을 제시한다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.2 s.332
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• pp.73-82
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• 2005

Test data volume and power consumption for scan vectors are two major problems in system-on-a-chip testing. Therefore, this paper proposes a new test data compression/decompression method for low power testing. The method is based on analyzing the factors that influence test parameters: compression ratio, power reduction and hardware overhead. To improve the compression ratio and the power reduction ratio, the proposed method is based on Modified Statistical Coding (MSC), Input Reduction (IR) scheme and the algorithms of reordering scan flip-flops and reordering test pattern sequence in a preprocessing step. Unlike previous approaches using the CSR architecture, the proposed method is to compress original test data, not $T_{diff}$, and decompress the compressed test data without the CSR architecture. Therefore, the proposed method leads to better compression ratio with lower hardware overhead and lower power consumption than previous works. An experimental comparison on ISCAS '89 benchmark circuits validates the proposed method.

• The Transactions of the Korea Information Processing Society
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• v.4 no.3
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• pp.880-894
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• 1997

In this paper,we propose a new algorithm to perform DCT(Discrete Cosine Transform) withn the area reduced by prdeicting position of quantization coefficients to be zero.This proposed algorithm not only decreases the enoding time and the decoding time by reducing computation amount of FDCT(Forward DCT)and IDCT(Inverse DCT) but also increases comprossion ratio by performing each diffirent horizontal- vereical zig-zag scan assording to the calssified block size for each block on the huffiman coeing.Traditional image coding method performs the samd DCT computation and zig-zag scan over all blocks,however this proposed algorthm reduces FDCT computation time by setting to zero insted of computing DCT for quantization codfficients outside classfified block size on the encoding.Also,the algorithm reduces IDCT computation the by performing IDCT for only dequantization coefficients within calssified block size on the decoding.In addition, the algorithm reduces Run-Length by carrying out horizontal-vertical zig-zag scan approriate to the slassified block chraateristics,thus providing the improverment of the compression ratio,On the on ther hand,this proposed algorithm can be applied to 16*16 block processing in which the compression ratio and the image resolution are optimal but the encoding time and the decoding time take long.Also,the algorithm can be extended to motion image coding requirng real time processing.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.8
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• pp.1914-1924
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• 2014

In this paper, a small-area cell array method of reducing number of SL drivers requiring large layout areas, where the SL drivers supplying programming currents are routed in the row direction in stead of the column direction for eFuse OTP memory IPs having less number of rows than that of columns such as a cell array of four rows by eight columns, and a core circuit are proposed. By adopting the proposed cell array and core circuit, the layout area of designed 32-bit eFuse OTP memory IP is reduced. Also, a V2V ($=2V{\pm}10%$) regulator necessary for RWL driver and BL pull-up load to prevent non-blown eFuse from being blown from the EM phenomenon by a big current is designed. The layout size of the designed 32-bit OTP memory IP having a cell array of four rows by eight columns is 13.4% smaller with $120.1{\mu}m{\times}127.51{\mu}m$ ($=0.01531mm^2$) than that of the conventional design with $187.065{\mu}m{\times}94.525{\mu}m$ ($=0.01768mm^2$).

• Journal of the Korean Society for Nondestructive Testing
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• v.14 no.2
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• pp.112-121
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• 1994

This paper discusses the feasibility of ultrasonic C-scan technique for nondestructive evaluation of spot weld quality. Ultrasonic evaluation for spot weld quality was performed by immersion method with the mechanical and the electronic scanning of point-focussed ultrasonic beam(25 MHz). For the sake of the approach to the quantitative measurement of nugget diameter and the discrimination of the corona bond from nugget, preliminary infinitesimal gap experiment by newton ring is tried in order to set up the optimum ultrasonic test condition. Ultrasonic image data obtained were confirmed and compared by optical microscope and SAM(Scanning Acoustic Microscope) observation of the spot-weld cross section. The results show that the nugget diameter can be measured with the accuracy of 1.0mm, and voids included in nugget can be detected to $10{\mu}m$ extent with simplicity and accuracy. Finally, it was found that it is necessary to make a profound study of definite discrimination of corona bond from nugget and the approach of quantitative evaluation of nugget diameter by utilizing the various image processing techniques.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.5
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• pp.58-65
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• 2007

As multimedia portable devices become popular, the amount of computation for processing data including video compression has significantly increased. Various researches for low power consumption of the mobile devices and real time processing have been reported. Motion Estimation is responsible for 67% of H.264 encoder complexity. In this research, a new circuit is designed for motion estimation. The new circuit uses motion prediction based on approximate SAD, Alternative Row Scan (ARS), DAU, and FDVS algorithms. Our new method can reduce the amount of computation by 75% when compared to multi-frame motion estimation suggested in JM8.2. Furthermore, optimal number and size of reference frame blocks are determined to reduce computation without affecting the PSNR. The proposed Motion Estimation method has been verified by using the hardware and software Co-Simulation with iPROVE. It can process 30 CIF frames/sec at 50MHz.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.2
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• pp.127-138
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• 2007

In this paper, we propose a new X-masking scheme for utilizing logic built-in self-test The new scheme exploits the phase-shifting network which is based on the shift-and-add property of maximum length pseudorandom binary sequences(m-sequences). The phase-shifting network generates mask-patterns to multiple scan chains by appropriately shifting the m-sequence of an LFSR. The number of shifts required to generate each scan chain mask pattern can be dynamically reconfigured during a test session. An iterative simulation procedure to synthesize the phase-shifting network is proposed. Because the number of candidates for phase-shifting that can generate a scan chain mask pattern are very large, the proposed X-masking scheme reduce the hardware overhead efficiently. Experimental results demonstrate that the proposed X-masking technique requires less storage and hardware overhead with the conventional methods.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.518-518
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• 2008

We propose an optical-based measuring instrument of catenary system in electric railway. This system was made to utilize line scan camera as inspecting system to measure the stagger and height of overhead contact wire in railway and composed with optical type source and FPGA-based image acquisition system with PCI slot. Vision acquisition software has been used for the application to programming interface for image acquisition, display, and storage with a frequency of sampling. The proposed optical-based measuring instrument to measure the contact wire geometry shows promising on-field applications for online condition motoring. Also, this system can be applied to measure the hight and stagger or other geometry of different type of overhead catenary system.