• Title/Summary/Keyword: Electronic Hybrid Circuits

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NEW OPTICALLY TRANSPARENT MATERIALS FOR TRANSPARENT ELECTRONICS AND DISPLAYS

  • Ju, Sang-Hyun;Liu, Jun;Li, Jianfeng;Chen, Po-Chiang;Zhou, Chongwu;Facchetti, Antonio;Janes, David B.;Marks, Tobin J.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.973-974
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    • 2008
  • Optically transparent and flexible electronic circuits and displays are attractive for next-generation visual technologies, including windshield displays, head-mounted displays, and transparent screen monitors. Here we report on the fabrication of transparent transistors and circuits based on the combination of nanoscopic dielectrics and organic, inorganic, or hybrid semiconductors. Furthermore, the first demonstration of a transparent and flexible AMOLED display driven solely by $In_2O_3$ nanowire transistors (NWTs) is reported. The display region exhibits an optical transmittance of ~35% and a green peak luminance of ${\sim}300\;cd/m^2$. These results indicate that NWT-based drive circuits are attractive for fully transparent display technologies.

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A Study on the Effect of Process Variation on the Performance of Hybrid MOSFET-CNTFET based SRAM (공정 편차가 하이브리드 MOSFET-CNTFET 기반 SRAM의 성능에 미치는 영향에 대한 연구)

  • Geunho Cho
    • Journal of IKEEE
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    • v.27 no.3
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    • pp.327-332
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    • 2023
  • CNTFET, which is receiving high attention as a next-generation semiconductor candidate due to its higher performance and various utilization than traditional silicon-based semiconductor devices, is having difficulty in commercialization because its unique process deviation such as CNT placement has not yet matured. To overcome this difficulty, numerous studies have been continuously conducted to take advantages of CNTFET and compensate its weakness by implementing circuits, which are less affected by process deviation due to repetitive circuit placement, into MOSFET-CNTFET based hybrid circuits. This paper compares how much the performance of the hybrid SRAM can be changed by semiconductor process variation existing in the traditional MOSFET SRAM or CNTFET SRAM. Simulation results show that, if the CNT density can be maintained between 7 and 9 per 32nm, hybrid SRAM is about 2.6 times and about 1.1 times more robust to process deviation than conventional MOSFET SRAM in read and write operations, respectively.

Over Current Protection Schemes for Active Filters with Series Compensators

  • Lee, Woo-Cheol;Lee, Taeck-Kie
    • KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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    • v.4B no.3
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    • pp.134-145
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    • 2004
  • This paper presents and analyses protection schemes for a series active compensator, which consists of a Unified Power Quality Conditioner (UPQC) or a hybrid active power filter. The proposed series active compensator operates as a high impedance "k(D)" for the fundamental components of the power frequency during over current conditions in the distribution system. Two control strategies are proposed in this paper. The first strategy detects the fundamental source current using the p-q theory. The second strategy detects the fundamental component of the load current in the Synchronous Reference Frame (SRF). When over currents occur in the power distribution system momentarily, the proposed schemes protect the series active compensator without the need for additional protection circuits, and achieves excellent transient response. The validity of the proposed protection schemes is investigated through simulation and compared with experimental results using a hybrid active power filter systems.

A Study on the Information Reversibility of Quantum Logic Circuits (양자 논리회로의 정보 가역성에 대한 고찰)

  • Park, Dong-Young
    • The Journal of the Korea institute of electronic communication sciences
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    • v.12 no.1
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    • pp.189-194
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    • 2017
  • The reversibility of a quantum logic circuit can be realized when two reversible conditions of information reversible and energy reversible circuits are satisfied. In this paper, we have modeled the computation cycle required to recover the information reversibility from the multivalued quantum logic to the original state. For modeling, we used a function embedding method that uses a unitary switch as an arithmetic exponentiation switch. In the quantum logic circuit, if the adjoint gate pair is symmetric, the unitary switch function shows the balance function characteristic, and it takes 1 cycle operation to recover the original information reversibility. Conversely, if it is an asymmetric structure, it takes two cycle operations by the constant function. In this paper, we show that the problem of 2-cycle restoration according to the asymmetric structure when the hybrid MCT gate is realized with the ternary M-S gate can be solved by equivalent conversion of the asymmetric gate to the gate of the symmetric structure.

Design Optimization of Hybrid-Integrated 20-Gb/s Optical Receivers

  • Jung, Hyun-Yong;Youn, Jin-Sung;Choi, Woo-Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.4
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    • pp.443-450
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    • 2014
  • This paper presents a 20-Gb/s optical receiver circuit fabricated with standard 65-nm CMOS technology. Our receiver circuits are designed with consideration for parasitic inductance and capacitance due to bonding wires connecting the photodetector and the circuit realized separately. Such parasitic inductance and capacitance usually disturb the high-speed performance but, with careful circuit design, we achieve optimized wide and flat response. The receiver circuit is composed of a transimpedance amplifier (TIA) with a DC-balancing buffer, a post amplifier (PA), and an output buffer. The TIA is designed in the shunt-feedback configuration with inductive peaking. The PA is composed of a 6-stage differential amplifier having interleaved active feedback. The receiver circuit is mounted on a FR4 PCB and wire-bonded to an equivalent circuit that emulates a photodetector. The measured transimpedance gain and 3-dB bandwidth of our optical receiver circuit is 84 $dB{\Omega}$ and 12 GHz, respectively. 20-Gb/s $2^{31}-1$ electrical pseudo-random bit sequence data are successfully received with the bit-error rate less than $10^{-12}$. The receiver circuit has chip area of $0.5mm{\times}0.44mm$ and it consumes excluding the output buffer 84 mW with 1.2-V supply voltage.

Prediction of the transient response of the IGBT using the Spice parameter (Spice parameter를 이용한 IGBT의 과도응답 예측)

  • 이효정;홍신남
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.815-818
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    • 1998
  • The Insulated Gate Bipolar Transistor has the characteristics of MOSFET and BJT. The characteristics of proposed device exhibit high speed switching, the voltage controlled property, and the low ON resistance. This hybrid device has been used and developed continuously in the power electronic engineering field. We can simulate many IGBT circuits, such as the motor drive circuit, the switching circuits etc, with PSpice. However, some problems in PSpice is that the IGBT is old-fashioned and is very difficult to get it. In this paper, the IGBT in PSpice is considered as the basic structure. We changed the valuse of base width, gate-drain overlaping area, device area, and doping concentration, then calculated MOS transconductance, ambipolar recombination lifetime etc. Using this resultant parameter, we could predict the transient response characteristicsof IGBT, for examplex, voltage overshoot, the rising curve of voltage, and the falling curve of current.

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Mutually-Actuated-Nano-Electromechanical (MA-NEM) Memory Switches for Scalability Improvement

  • Lee, Ho Moon;Choi, Woo Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.2
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    • pp.199-203
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    • 2017
  • Mutually-actuated-nano-electromechanical (MA-NEM) memory switches are proposed for scalability improvement. While conventional NEM memory switches have fixed electrode lines, the proposed MA-NEM memory switches have mutually-actuated cantilever-like electrode lines. Thus, MA-NEM memory switches show smaller deformations of beams in switching. This unique feature of MA-NEM memory switches allows aggressive reduction of the beam length while maintaining nonvolatile property. Also, the scalability of MA-NEM memory switches is confirmed by using finite-element (FE) simulations. MA-NEM memory switches can be promising solutions for reconfigurable logic (RL) circuits.

Surge Protective Device Combined with Varistor and LC Filter on AC Power Circuits (바리스터와 LC필터를 조합한 교류 전원용 서지보호장치)

  • 이복희;이경옥;안창환;이승칠;박정웅
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.11 no.4
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    • pp.109-116
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    • 1997
  • This paper describes the surge protective device combined with varistor and LC low pass filter on AC power circuits. Up to now varistors alone have been used as a surge protective device on AC power circuits, but it gives negative effects on the equipments to be protected due to the steep rise and high remnant voltage. Therefore in this work, for the purpose of improving the cutoff performance of surge protective device on AC power circuits, the hybrid-type surge protective device with varistor and LC filter was designed and prepared. And the experiments for operational characteristics and clamping performance of the surge protective device were carried out with an 1.2/50[$\mu$s] impulse generator. As a result, the proposed surge protective device with the combination of varistors and LC filter can limit the surge voltage to lower value and reduce the value of dV /dt to very small values. Also the attenuation of high-frequency voltages across the output port is effectively provided by LC filter. Therefore this result may be all the more helpful avoiding both damage and upset of electronic systems.

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Size-Reduction of Frequency Mixers Using Artificial Dielectric Substrate (임의유전체 기판을 이용한 주파수 혼합기의 소형화)

  • Kwon, Kyunghoon;Lim, Jongsik;Jeong, Yongchae;Ahn, Dal
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.62 no.5
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    • pp.657-662
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    • 2013
  • A size-reduced high frequency mixer designed by adopting artificial dielectric substrate is described in this work. The artificial dielectric substrate is composed by stacking the lower substrate in which a lot of metalized via-holes exist, and upper substrate on which microstrip lines are realized. The effective dielectric constant increases due to the inserted lots of via-holes, and this may be applied to size-reduction of high frequency circuits. In this work, in order to present an application example of size-reduction for active high frequency circuits using the artificial dielectric substrate, a 8GHz single gate mixer is miniaturized and measured. It is described that the basic circuit elements for mixers such as hybrid, low pass filter, and matching networks can be replaced by the artificial dielectric substrate for size-reduction. The final mixer has 55% of size compared to the normal one. The measured average conversion gain is around 3dB which is almost similar result as the normal circuit.

MAGFET Hybrid IC with Frequency Output (주파수 출력을 갖는 MAGFET Hybrid IC)

  • Kim, Si-Hon;Lee, Cheol-Woo;Nam, Tae-Chul
    • Journal of Sensor Science and Technology
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    • v.6 no.3
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    • pp.194-199
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    • 1997
  • When voltage or current gets out of the magnetic sensor as it is, we have often faced the problems such as introduction of noise and loss of voltage. In order to reduce these problems, a 2 drain MAGFET operating in the saturation region and fabricated by CMOS process, the system of I/V converter, VCO with operational amplifier, and V/F conversion circuits with Schmitt Trigger are designed and fabricated in one package. The absolute sensitivity of magnetic sensor shows 1.9 V/T and the product sensitivity is $3.2{\times}10^{4}\;V/A{\cdot}T$. The characteristic of V/F conversion is very stabilized and has the value of 190 kHz/T.

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