• Journal of the Korean institute of surface engineering
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• v.55 no.4
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• pp.202-214
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• 2022

Internal connections between device, package and external terminals for connecting packaging and printed circuit board are normally manufactured by electroless Ni-P plating followed by immersion Au plating (ENIG process) to ensure the connection reliability. In this study, a new non-cyanide-based immersion and electroless Au plating solutions using thiomalic acid as a complexing agent and aminoethanethiol as a reducing agent was investigated on different underlayer electroless Ni-P plating layers. As a result, it was confirmed that the deposition behavior and film properties of electroless Au plating are affected by grain size and impurity of the electroless Ni-P film, which is used as the plating underlayer. Au plating on the electroless Ni-P plating film with a dense surface structure showed the highest bonding strength. In addition, the electroless Au plating film on the Ni-P plating film has a smaller particle size exhibited higher bonding strength than that on the large particle size.

• Journal of the Korean institute of surface engineering
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• v.55 no.5
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• pp.299-307
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• 2022

Gold plating is used as a coating of connector in printed circuit boards, ceramic integrated circuit packages, semiconductor devices and so on, because the film has excellent electric conductivity, solderability and chemical properties such as durability to acid and other chemicals. In most cases, internal connection between device and package and external terminals for connecting packaging and printed circuit board are electroless Ni-P plating followed by immersion Au plating (ENIG) to ensure connection reliability. The deposition behavior and film properties of electroless Au plating are affected by P content, grain size and mixed impurity components in the electroless Ni-P alloy film used as the underlayer plating. In this study, the correlation between electroless nickel plating used as a underlayer layer and cyanide-free electroless Au plating using thiomalic acid as a complexing agent and aminoethanethiol as a reducing agent was investigated.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.05a
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• pp.708-711
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• 1999

The Cu/Ni/Au lamellar structure is extensively used as an under bump metallization on silicon file, and on printed circuit board(PCB) pads. Ni is plated Cu by either electroless Ni plating, or electrolytic Ni plating. Unlike the electrolytic Ni plating, the electroless Ni plating does not deposit pure Ni, but a mixture of Ni and phosphorous, because hypophosphite Is used in the chemical reaction for reducing Ni ions. The fracture crack extended at the interface between solder balls of plastic ball grid (PBGA) package and conducting pads of PCB. The fracture is duets to segregation at the interface between Ni$_3$Sn$_4$intermetallic and Ni-P layer. The XPS diffraction results of Cu/Ni/Au results of CU/Ni/AU finishs showed that the Ni was amorphous with supersaturated P. The XPS and EDXA results of the fracture surface indicated that both of the fracture occurred on the transition lesion where Sn, P and Ni concentrations changed.

• Journal of the Korean Electrochemical Society
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• v.2 no.3
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• pp.138-143
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• 1999

Recently, miniaturization of large scale integrated circuits (LSI) and printed circuit board (PCB) have become essential with the downsizing of electronic devices. Gold electroplating is applied of conductivity wiring or terminals for improvement of conductivity and corrosion resistance. However, electroplating is not applicable since the circuits are becoming finer and denser. Accordingly, electroless plating is recently highly attractive method because of the simplicity of the operation requiring no external source of current and no elaborate equipment. In this work, we tried to develop a plating technique on electroless Ni/Au plating. First, the electroless Ni plating was deposited on the PCB with agitation in the bath at $85^{\circ}C$. Then the Au layer was deposited on the Ni layer surface by same method at $90^{\circ}C$. The bonderability were tested in order to evaluate the stability of the electroless Ni/Au by gold wire or solder ball test.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.2 s.35
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• pp.95-103
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• 2005

The interfacial reaction between 42Sn-58Bi solder (in wt.$\%$ unless specified otherwise) and electroless Ni-P/immersion Au has been investigated before and after thermal aging, with a focus on formation and growth of an intermetallic compound (IMC) layer, consumption of under bump metallurgy (UBM), and bump shear strength. The immersion Au layer with thicknesses of 0 (bare Ni), 0.1, and $1{\mu}m$ was plated on the $5{\mu}m$ thick electroless Ni-P ($14{\~}15 at.\%$P) layer. Then, the 42Sn-58Bi solder balls were fabricated on three different UBM structures by screen-printing and pre-reflow. The $Ni_3Sn_4$ layer (IMC1) was formed at the joint interface after pre-reflow for all the three UBM structures. On aging at $125^{\circ}C$, a quaternary phase (IMC2) was observed above the $Ni_3Sn_4$ layer in the Au-containing UBM structures, which was identified as $Sn_{77}Ni{15}Bi_6Au_2$ (in at.$\%$). The thick $Sn_{77}Ni{15}Bi_6Au_2$ layer deteriorated the integrity of the solder joint and the shear strength of the solder bump was decreased by about $40\%$ compared with non-aged joints.

• Journal of the Korean institute of surface engineering
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• v.40 no.1
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• pp.32-38
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• 2007

Ni coating layers were formed using a newly developed electroless Ni plating solution. The properties of Ni coating layer such as internal stress, hardness, surface roughness, crystallinity, solderability and surface morphology were investigated using various tools. Results revealed that internal stress decreased with plating time and reached $40N/mm^2$ at 20 minutes of the plating time. Hardness increased with increasing P content and thickness. Surface roughness of the pad decreased with Ni and Ni/Au plating. Crystallinity decreased with increasing P content. Solderability based on wettability decreased with Ni and Ni/Au plating. Based on surface morphology, it is expected that Ni coating layer formed using a newly developed electroless Ni plating solution is lower than that formed using a commercial electroless Ni plating solution in possibility of black pad occurrence.

• Journal of the Microelectronics and Packaging Society
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• v.8 no.3
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• pp.55-62
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• 2001

With a spread of BGA, CSP and fine pitch devices, the need of flatter surface finish in bare board is becoming more critical in solderability. The electroless Ni/Au plating has a solution of these needs and also has being spread to apply to surface finish for bare board in many electronic goods. But, the electroless Ni/Au plating had several issues such as Ni oxidation and phosphorous contents. Before this study, we studied on the effect of BGA solderability in electroless Ni/Au plating and chose some major factors such as the oxidation property of NiP plating and warpage of board. Firstly, we made test board with various plating conditions and improved the plating property through the improvement of NiP oxidation reducing P content. Also, we minimized the warpage of board with the improvement of inner layer structure and the analysis of warpage. For the evaluation of solderability, we analyzed the warpage of board and the plating property after mounting BGA on the board with optimizing conditions. The solder joint of BGA is investigated by SEM(Scanning Electronic Microscope) and OM(Optical Microscope). The composition of joint is used by EDS(Energy Dispersive Spectroscopy). We analyzed the fracture strength and mode by ball shear teser.

• Proceedings of the Materials Research Society of Korea Conference
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• 1995.11a
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• pp.82-82
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• 1995

• Proceedings of the Materials Research Society of Korea Conference
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• 1998.11a
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• pp.80-80
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• 1998

• Journal of the Korean institute of surface engineering
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• v.50 no.3
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• pp.170-176
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• 2017

EPIG (Electroless Pd/immersion Au) process was studied to replace ENIG (electroless Ni/immersion Au) and ENEPIG (electroless Ni/electroless Pd/immersion Au) processes for bump surface treatment used in high reliable flip chip packages. The palladium and gold layers formed by EPIG process were uniform with thickness of 125 nm and 34.5 nm, respectively. EPAG (Electroless Pd/autocatalytic Au) also produced even layers of palladium and gold with the thickness of 115 nm and 100 nm. TEM results exhibited that the gold layer in EPIG surface had crystalline structure while the palladium layer was amorphous one. After annealing at 250 nm, XPS analysis indicated that the palladium layer with thickness more than 22~33 nm could act as a diffusion barrier of copper interconnects. As a result of comparing the chip shear strength obtained from ENIG and EPIG surfaces, it was confirmed that the bonding strength was similar each other as 12.337 kg and 12.330 kg, respectively.