• Proceedings of the KIEE Conference
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• 2002.07c
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• pp.2020-2022
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• 2002

SiC direct bonding technology is very attractive for both SiCOI(SiC-on-insulator) electric devices and SiC-MEMS fileds because of its application possibility in harsh environements. This paper presents on pre-bonding according to HF pre-treatment conditions in SiC wafer direct bonding using PECVD oxide. The PECVD oxide was characterized by XPS and AFM, respectively. The characteristics of bonded sample were measured under different bonding conditions of HF concentration and applied pressure, respectively. The bonding strength was evaluated by tensile strength method. Components existed in the interlayer were analyzed by using FT-IR. The bond strength depends on the HF pre-treatment condition before pre-bonding (Min : 5.3 kgf/$cm^2{\sim}$ Max : 15.5 kgf/$cm^2$).

• Applied Science and Convergence Technology
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• v.26 no.3
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• pp.43-46
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• 2017

Aluminum-doped ZnO (AZO) thin films were deposited by atomic layer deposition (ALD) with respect to the Al doping concentrations. In order to explain the chemical stability and electrical properties of the AZO thin films after hydrogen peroxide ($H_2O_2$) solution immersion treatment at room temperature, we investigated correlations between the electrical resistivity and the electronic structure, such as chemical bonding state, conduction band, band edge state below conduction band, and band alignment. Al-doped at ~ 10 at % showed not only a dramatic improvement of the electrical resistivity but also excellent chemical stability, both of which are strongly associated with changes of chemical bonding states and band edge states below the conduction band.

• Proceedings of the KIEE Conference
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• 1996.07c
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• pp.1946-1949
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• 1996

We have performed silicon-to-silicon anodic bonding using glass layer deposited by electron beam evaporation. Wafers can be bonded at $135^{\circ}C$ with an applied voltage of $35V_{DC}$, which enables application of this technique to the vacuum packaging of microelectronic devices, because its bonding temperature and voltage are low. From the experimental results, we have found that the evaporated glass layer more than $1\;{\mu}$ m thick was suitable for anodic bonding. The role of sodium ions for anodic bonding was also investigated by theoretical bonding mechanism and experimental inspection.

• Current Photovoltaic Research
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• v.3 no.1
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• pp.1-4
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• 2015

In this study, we analyzed the correlation between mechanical and electrical properties of low-temperature conductive film (LT-CF) bonded silicon solar cells by a quadrant analysis (horizontal axis (peeling strength), vertical axis (power loss)). We found that a series of points with various bonding parameters such as bonding temperature, pressure and time were distributed in the different three regimes; weak regime (Q2: weak bonding strength and high power loss), moderate regime (Q4 : strong bonding strength and low power loss) and hard regime (Q3 : weak bonding strength and low power loss). Using this analogous technique, it was possible to fabricate the LT-CF bonded silicon solar cells with the various conditions displayed in Q3 of the quadrant plots, possessing the peeling strength of ~ 1N/mm and power loss of 2~3%.

• Journal of Sensor Science and Technology
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• v.16 no.5
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• pp.325-330
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• 2007

For the application to optic devices, wafer level package including spacer with particular thickness according to optical design could be required. In these cases, the uniformity of spacer thickness is important for bonding strength and optical performance. Packaging process has to be performed at low temperature in order to prevent damage to devices fabricated before packaging. And if photosensitive material is used as spacer layer, size and shape of pattern and thickness of spacer can be easily controlled. This paper presents polymer bonding using thick, uniform and patterned spacing layer of SU-8 2100 photoresist for wafer level package. SU-8, negative photoresist, can be coated uniformly by spin coater and it is cured at $95^{\circ}C$ and bonded well near the temperature. It can be bonded to silicon well, patterned with high aspect ratio and easy to form thick layer due to its high viscosity. It is also mechanically strong, chemically resistive and thermally stable. But adhesion of SU-8 to glass is poor, and in the case of forming thick layer, SU-8 layer leans from the perpendicular due to imbalance to gravity. To solve leaning problem, the wafer rotating system was introduced. Imbalance to gravity of thick layer was cancelled out through rotating wafer during curing time. And depositing additional layer of gold onto glass could improve adhesion strength of SU-8 to glass. Conclusively, we established the coating condition for forming patterned SU-8 layer with $400{\mu}m$ of thickness and 3.25 % of uniformity through single coating. Also we improved tensile strength from hundreds kPa to maximum 9.43 MPa through depositing gold layer onto glass substrate.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.6
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• pp.479-485
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• 2002

We have investigated the effects of various wafers cleaning on glass/Si bonding using 4 inch Pyrex glass wafers and 4 inch silicon wafers. The various wafer cleaning methods were examined; SPM(sulfuric-peroxide mixture, $H_2SO_4:H_2O_2$ = 4 : 1, $120^{\circ}C$), RCA(company name, $NH_4OH:H_2O_2:H_2O$ = 1 : 1 : 5, $80^{\circ}C$), and combinations of those. The best room temperature bonding result was achieved when wafers were cleaned by SPM followed by RCA cleaning. The minimum increase in surface roughness measured by AFM(atomic force microscope) confirmed such results. During successive heat treatments, the bonding strength was improved with increased annealing temperatures up to $400^{\circ}C$, but debonding was observed at $450^{\circ}C$. The difference in thermal expansion coefficients between glass and Si wafer led debonding. When annealed at fixed temperatures(300 and $400^{\circ}C$), bonding strength was enhanced until 28 hours, but then decreased for further anneal. To find the cause of decrease in bonding strength in excessively long annealing time, the ion distribution at Si surface was investigated using SIMS(secondary ion mass spectrometry). tons such as sodium, which had been existed only in glass before annealing, were found at Si surface for long annealed samples. Decrease in bonding strength can be caused by the diffused sodium ions to pass the glass/si interface. Therefore, maximum bonding strength can be achieved when the cleaning procedure and the ion concentrations at interface are optimized in glass/Si wafer direct bonding.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.198-198
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• 2009

The size of LCD Panel is gradually getting bigger. But the efficient uses of glass and the increasing output of narrow bezel type makes importantly the role of sealant which bonding two glasses. We devised a new tester with pre-inserted blade for interfacial fracture toughness measurement, and evaluated quantitatively bonding ability of sealant. The blade tester has been analyzed with two process parameter, moving speed and inserting depth of blade.

• Transactions on Electrical and Electronic Materials
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• v.15 no.4
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• pp.221-225
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• 2014

Although gold wire bonding techniques have already matured in semiconductor manufacturing, weakly bonded wires in semiconductor chip assembly can jeopardize the reliability of the final product. In this paper, weakly bonded or failed aluminum bonding pads are analyzed using X-ray photoelectron spectroscopy (XPS), Auger electron Spectroscopy (AES), and energy dispersive X-ray analysis (EDX) to investigate potential contaminants on the bond pad. We found the source of contaminants is related to the dry etching process in the previous manufacturing step, and fluorocarbon plasma etching of a passivation layer showed meaningful evidence of the formation of fluorinated by-products of $AlF_x$ on the bond pads. Surface analysis of the contaminated aluminum layer revealed the presence of fluorinated compounds $AlOF_x$, $Al(OF)_x$, $Al(OH)_x$, and $CF_x$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.874-877
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• 2001

SOI(Silicon-On-Insulator) technology is proposed as an alternative to bulk silicon for MEMS(Micro Electro Mechanical System) manufacturing. In this paper, we fabricated the SOI wafer with uniform active layer thickness by silicon direct bonding and mechanical polishing processes. Specially-designed electrostatic bonding system is introduced which is available for vacuum packaging and silicon-glass wafer bonding for SOG(Silicon On Glass) wafer. We demonstrated thermopile sensor and RF resonator using the SOI wafer, which has the merits of simple process and uniform membrane fabrication.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.1
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• pp.70-72
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• 2000

In this paper, a spacer process for FED(Field Emission Display) was developed with the glass to glass anodic bonding technology using Al film as an interlayer and a 3.5 inch monochromatic type FED was fabricated. Holder to dislocate spacers vertically was designed with (110) Si wafer by bulk etching. Spacers, $100\mum\; width\; and\; 1000\mum$ height, were formed on anode panel by spacer to glass anodic bonding and the fabricated FED was operated for emission at 1㎸ anode voltage.