• Journal of the Microelectronics and Packaging Society
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• v.11 no.2 s.31
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• pp.49-52
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• 2004

Ceramic components and modules using LTCC passives are being performed and on the passives included in modules have been studied nowadays. However the characteristics changes of passives in ceramic module due to the coupling between patterns, so each block in module, must be analyzed in the state of module including coupling factors. In our research, characteristics of each block of VCO, resonator part, oscillator part, output part were measured and analyzed to allow the prediction of behavior of VCO.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.05c
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• pp.269-272
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• 2003

Nowadays, the study on the ceramic components and modules using LTCC is being performed and on the passives included in modules is being done also. But the characteristics of passives changes in ceramic module due to the coupling between patterns, so each block in module must be analyzed in the state of module including coupling factors. In our research each block of VCO, resonator part, oscillator part, output part is measured and analyzed and that allows the prediction of behavior of VCO.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.2
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• pp.73-78
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• 2011

A frequency synthesizer for DAB applications is designed using $0.18{\mu}m$ CMOS process with 1.8V supply. NP-core type is chosen for VCO core to improve low power characteristic and symmetric characteristic of output waveform. VCO range is 1302.34 MHz - 1949.51 MHz using switchable capacitor bank and varactor bank. Varactor biases that improve varactor capacitance characteristics were minimized as two, $K_{vco}$(VCO gain) is maintained using technique of varactor bank switching. Intervals of $K_{vco}$ are maintained adding VCO frequency compensation logic. Each block of VCO and frequency synthesizer designed $0.18{\mu}m$ CMOS process with 1.8V supply is verified by Cadence Spectre, measured VCO consumes 9mA current, and is 39.8% tuning range, total power consumption of the frequency synthesizer is 18mW.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.2641-2647
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• 2003

Conventional DLLs estimate the delay times of satellite signals individually and feed back these measurements to the VCO independently. But VDLL estimates delay times and user position directly and then estimate the feedback term for VCO using the estimated position changes. In this process, input measurements are treated as vectors and these vectors are used for navigation. First advantage of VDLL is that noise is reduced in all of the tracking channels making them less likely to enter the nonlinear region and fall below threshold. Second is that VDLL can operate successfully when the conventional independent parallel DLL approach fails completely. It means that VDLL receiver can get enough total signal power to track successfully to obtain accurate position estimates under the same conditions where the signal strength from each individual satellite is so low or week that none of the individual scalar DLL can remain in lock when operating independently. To operate VDLL successfully, it needs to know the initial user dynamics and position and prevents total system from the divergence. The suggested integration method is to use the inertial navigation system to provide initial dynamics for VDLL and to maintain total system stable. We designed the GPS/INS integrated navigation system. This new type of integrated system contained the vector pseudorange format generation block, VDLL signal processing block, position estimation block and the conversion block from position change to delay time feedback term aided by INS.