• 한국환경교육학회지:환경교육
• /
• 제24권1호
• /
• pp.102-113
• /
• 2011

The role of teachers has been explicitly emphasized to implement the vision of sustainable development(SD). Also, it is very important to understand the way student teachers understand SD and how they interpret their own professional task in terms of SD, usually referred to as education for sustainable development(ESD). This study investigated student teachers' perceptions of SD and ESD using group interview. Key findings include, first, that they think SD as development which does not exceed the limits of natural environment, and as wise management of resources/protection of environment for future generations. They also think SD as good thing though they don't understand the contested nature of SD. Second they think ESD as education about SD, but some student teachers say they can't explain ESD. Many student teachers prefer field trip to local examples for both elementary school students and themselves. Also they will teach only what the textbook says about SD and ESD during their school placement and as teachers. So it will be the beginning of ESD in school to include SD in the curriculum for students and student teachers. It is suggested to study student teachers' perception of SD focussing on how they think the relationship between protection of environment and economic growth.

• 한국환경교육학회지:환경교육
• /
• 제24권1호
• /
• pp.88-101
• /
• 2011

This study aims to address the current status of ESD(Education for Sustainable Development) in Korean universities since UN DESD was launched in 2005, and to explore the possibilities and challenges in them. For this purpose we conducted questionnaire surveys and case studies on members of university communities which were engaged in green campus activities or interested in SD and ESD. Results of questionnaire surveys showed that most of those who answered the questionnaire were well aware of SD, but had comparatively low understanding of ESD. The highest number of respondents answered that since 2005 they had newly opened courses on SD or ESD, or added contents on SD or ESD to existing ones. Ratio of network participation among ESD-related universities was over 30%, and they appeared to have the highest partnership ratio with NGOs. Not many universities had policies for sustainable school management, and 'green space conservation and ecosystem protection' and 'energy and resource saving campaign and monitoring' were most common sustainable environment protection activities. Through case studies on eight universities, it was discovered that ESD programs in universities took various forms such as whole-university approaches, participatory courses and club activities. We suggest that it is needed to make efforts to find out good examples of ESD in Korean universities and share the results with university leaders, professors and staffs for further development of ESD.

• 전자공학회논문지D
• /
• 제34D권11호
• /
• pp.37-47
• /
• 1997

Utilizing 2-dimensional device simulations incorporating lattic eheating models, we analyzed in detail the DC breakdown characterisics of NMOS trasistors with different structures, which are commonly used as ESD protection transistors. The mechanism leading to device failure resulting from electrostatic discharge was explained by analyzing the 1st and 2nd breakdown characteristics of LDD devices. Also a criteria for more robust designs of NMOS transistor structures against ESD was suggested by examining the characteristics changes with changes in structural parameters such as the LDD doping concentration, the drain junction depth, the distance between source/drain contacts, and the source junction area.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2006년도 하계종합학술대회
• /
• pp.589-590
• /
• 2006

A novel Triple-Well P-type Triggered Silicon Controlled Rectifier (TWPTSCR) for on-chip ESD protection implemented with a triple-well CMOS technology is presented. Unlike conventional SCR devices, the proposed TWPTSCR offers a reduced triggering voltage level as well as the enhanced ESD performance of the SCR devices. From the experimental results, the TWPTSCR with a device width of 20um has the triggering voltage of 1.1V.

• 한국조명전기설비학회:학술대회논문집
• /
• 한국조명전기설비학회 2002년도 학술대회논문집
• /
• pp.105-109
• /
• 2002

A TVS and Varistor are preservative equipment against electro static discharge(ESD). We use a TVS for I/O protection of a circuit which has faster response time than a Varistor. And a Varistor has large power capability, therefore, which be used in input stage for internal pressure prevention. This paper will compare a TVS with a Varistor with respect to response characteristic to ESD in DC 24[V] low voltage circuit.

• 전기전자학회논문지
• /
• 제15권4호
• /
• pp.330-338
• /
• 2011

본 논문에서는 다중 스위치를 이용한 전류모드 벅-부스트 컨버터의 벅-부스트 컨버터를 제안하였다. 제안한 컨버터는 넓은 출력 전압 범위와 높은 전류 레벨에서 높은 전력 변환 효율을 갖기 위해 PWM 제어법을 이용하였다. 제안한 컨버터는 최대 출력전류 300mA, 입력 전압 3.3V, 출력 전압 700mV~12V, 1.5MHz의 스위칭 주파수, 최대효율 90% 갖는다. 또한, dc-dc 컨버터의 신뢰성과 성능을 향상시키기 위해 보호회로를 추가하였다. 그리고 Deep-submicron 공정 기술을 이용한 ESD 보호회로를 제안하였다. 제안된 보호회로는 게이트-기판 바이어싱 기술을 이용하여 낮은 트리거 전압을 구현하였다. 시뮬레이션 결과는 일반적인 ggnmos의 트리거 전압(8.2V) 에 비해 고안된 소자의 트리거 전압은 4.1V 으로 더 낮은 트리거 전압 특성을 나타냈다.

• 한국위성정보통신학회논문지
• /
• 제10권4호
• /
• pp.1-5
• /
• 2015

PPS 소자가 삽입된 부분웰 구조의 N형 실리콘 제어 정류기(NSCR_PPS) 소자에서 정전기 보호 성능의 향상을 위한 CPS 이온주입조건의 최적화에 대해 연구하였다. 종래의 NSCR 표준소자는 on-저항, 스냅백 홀딩 전압 및 열적 브레이크다운 전압이 너무 낮아 정전기 보호소자의 필요조건을 만족시키지 못해 적용이 어려웠으나, 본 연구에서 제안하는 CPS 이온주입과 부분웰 이온주입을 동시에 적용한 변형 설계된 소자의 경우 스냅백 홀딩 전압을 동작전압 이상으로 증가시킬 수 있는 향상된 정전기 보호성능을 나타내어 고전압 동작용 마이크로 칩의 정전기보호 소자로 적용 가능함을 확인하였다.

• ETRI Journal
• /
• 제39권5호
• /
• pp.746-755
• /
• 2017

In this paper, an electrostatic discharge (ESD) protection circuit is designed for use as a 12 V power clamp by using a parasitic-diode-triggered silicon controlled rectifier. The breakdown voltage and trigger voltage ($V_t$) of the proposed ESD protection circuit are improved by varying the length between the n-well and the p-well, and by adding $n^+/p^+$ floating regions. Moreover, the holding voltage ($V_h$) is improved by using segmented technology. The proposed circuit was fabricated using a $0.18-{\mu}m$ bipolar-CMOS-DMOS process with a width of $100{\mu}m$. The electrical characteristics and robustness of the proposed ESD circuit were analyzed using transmission line pulse measurements and an ESD pulse generator. The electrical characteristics of the proposed circuit were also analyzed at high temperature (300 K to 500 K) to verify thermal performance. After optimization, the $V_t$ of the proposed circuit increased from 14 V to 27.8 V, and $V_h$ increased from 5.3 V to 13.6 V. The proposed circuit exhibited good robustness characteristics, enduring human-body-model surges at 7.4 kV and machine-model surges at 450 V.

• 한국위성정보통신학회논문지
• /
• 제9권4호
• /
• pp.63-68
• /
• 2014

PPS 구조를 갖는 N형 실리콘 제어 정류기 소자에서 부분웰 구조가 정전기 보호 성능에 미치는 영향을 고찰하였다. 종래의 NSCR 표준소자는 온-상태 저항, 스냅백 홀딩 전압 및 열적 브레이크다운 전압이 너무 낮아 정전기 보호소자의 필요조건을 만족시키지 못해 적용이 어려웠으나, 본 연구에서 제안하는 부분웰 구조를 갖도록 변형 설계된 NSCR-PPS 소자는 안정한 정전기보호 성능을 나타내어 고전압 동작용 마이크로 칩의 정전기보호 소자로 적용 가능함을 확인하였다.

• 한국위성정보통신학회논문지
• /
• 제10권4호
• /
• pp.6-11
• /
• 2015

PPS 소자가 삽입된 N형 실리콘 제어 정류기(NSCR_PPS)소자에서 게이트와 $N^+$ 확산층 간격(Gate to Primary $N^+$ diffusion Space; GPNS)의 변화가 정전기 보호 성능에 미치는 영향을 연구하였다. FPW 구조와 CPS 이온주입을 행하지 않은 구조를 갖는 종래의 NSCR 표준소자는 on 저항, 스냅백 홀딩 전압 및 열적 브레이크다운 전압이 너무 낮아 정전기 보호소자의 필요조건을 만족시키지 못해 마이크로칩의 정전기보호소자로 적용이 어려웠다. 그러나 본 연구에서 제안하는 PPW 구조와 CPS 이온주입을 동시에 적용하여 변형설계된 소자에서는 GPNS의 변화가 정전기 보호성능의 향상에 영향을 주는 중요한 파라미터였으며, 정전기보호소자의 설계창을 만족시키는 향상된 정전기보호성능을 나타내어 고전압 동작용 마이크로 칩의 정전기보호 소자로 적용 가능함을 확인하였다.