• Title/Summary/Keyword: EFMPlus code

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Simplified Decoder of the Modulation Code for DVD System (DVD 시스템에서 사용되는 변조 코드에 대한 간소화된 디코더)

  • Kim Hyoung seok;Lee Joohyun;Lee Jaejin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.4C
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    • pp.247-252
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    • 2005
  • Currently, the decoder receives a 16 bit channel input and restores an 8 bit data symbol in the DVD system. Such modulation code of DVD is the EFMplus code, and it is composed of a main table and a sub table. For reducing the size of the code table, this paper divided the code table into 3 groups and we implemented the decoder using this new code table. After all, this method enables us to reduce the size of ROM as reducing the total number of code from 1376 to 750.

(2, 15) RLL Code and Coding Format for DC-suppression (DC-억압을 위한 (2, 15) RLL 코드 및 코딩 기법)

  • 이주현;이재진;홍유표
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.10B
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    • pp.1453-1457
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    • 2001
  • 본 논문에서는 DC-제거 가능한 (2, 15) 런-길이 제한(RLL) 코드와 이 코드를 이용한 고밀도 광 기록을 위한 고효율의 성능을 나타내는 코딩 방법을 제안한다. 이 방법은 8/16의 코드율을 갖는 가족의 EFMPlus 코드와 비교하여 k-구속 조건이 다른 런-길이 파라미터를 가지고 있으나 EFM 코드에 비해 최소 6%에서 최대 10% 이상 높은 정보 밀도를 갖고 있어 고밀도 광 기록 시스템에 적용이 가능하다. 모의 실험을 통해, 코드율이 8/16에서는 EFMPlus 코드와 거의 유사한 성능을 보임을 확인했다.

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Error Control Scheme for High-Speed DVD Systems

  • Lee, Joon-Yun;Lee, Jae-Jin;Park, Tae-Geun
    • 정보저장시스템학회:학술대회논문집
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    • 2005.10a
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    • pp.103-110
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    • 2005
  • We present a powerful error control decoder which can be used in all of the commercial DVD systems. The decoder exploits the error information from the modulation decoder in order to increase the error correcting capability. We can identify that the modulation decoder in DVD system can detect errors more than $60\%$ of total errors when burst errors are occurred. In results, fur a decoded block, error correcting capability of the proposed scheme is improved up to $25\%$ more than that of the original error control decoder. In addition, the more the burst error length is increased, the better the decoder performance. Also, a pipeline-balanced RSPC decoder with a low hardware complexity is designed to maximize the throughput. The maximum throughput of the RSPC decoder is 740Mbps@100MHz and the number of gate counts is 20.3K for RS (182, 172, 11) decoder and 30.7K for RS (208, 192, 17) decoder, respectively

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