• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2021.05a
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• pp.63-65
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• 2021

This paper describes an integrated H/W-S/W implementation of elliptic curve digital signature algorithm (EC-DSA) using a security system-on-chip (SoC). The security SoC uses the Cortex-A53 APU as CPU, and the hardware IPs of high-performance elliptic curve cryptography (HP-ECC) core and SHA3 (secure hash algorithm 3) hash function core are interfaced via AXI4-Lite bus protocol. The signature generation and verification processes of EC-DSA were verified by the implementation of the security SoC on a Zynq UltraScale+ MPSoC device.

• TTA Journal
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• s.80
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• pp.98-104
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• 2002

타원곡선 암호는 기존의 RSA나 Diffie-Hellman, DSA 등에 비해 짧은 키 길이를 사용하면서도 훨씬 빠른 구현이 가능하므로 다양한 국제 표준들에서 이를 지원하고자 하는 노력이 급증하고 있다. 본 기고에서는 타원곡선 암호와 관련된 국제표준들의 표준화 동향과 함께 현재 TTA 정보통신단체표준으로 제정된 국내 타원곡선 전자서명 표준인 EC-KCDSA에 대해서 간략히 소개하기로 한다.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.15 no.3
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• pp.65-76
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• 2005

Speeding up scalar multiplication of an elliptic curve point has been a prime approach to efficient implementation of elliptic curve schemes such as EC-DSA and EC-ElGamal. Koblitz introduced a $base-{\phi}$ expansion method using the Frobenius map. Kobayashi et al. extended the $base-{\phi}$ scalar multiplication method to suit Optimal Extension Fields(OEF) by introducing the table reference method. In this paper we propose an efficient scalar multiplication algorithm on elliptic curve over OEF. The proposed $base-{\phi}$ scalar multiplication method uses an optimized batch technique after rearranging the computation sequence of $base-{\phi}$ expansion usually called Horner's rule. The simulation results show that the new method accelerates the scalar multiplication about $20\%{\sim}40\%$ over the Kobayashi et al. method and is about three times as fast as some conventional scalar multiplication methods.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.11
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• pp.1470-1476
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• 2020

This paper describes a design of a lightweight security system-on-chip (SoC) suitable for the implementation of security protocols for IoT and mobile devices. The security SoC using Cortex-M0 as a CPU integrates hardware crypto engines including an elliptic curve cryptography (ECC) core, a SHA3 hash core, an ARIA-AES block cipher core and a true random number generator (TRNG) core. The ECC core was designed to support twenty elliptic curves over both prime field and binary field defined in the SEC2, and was based on a word-based Montgomery multiplier in which the partial product generations/additions and modular reductions are processed in a sub-pipelining manner. The H/W-S/W co-operation for elliptic curve digital signature algorithm (EC-DSA) protocol was demonstrated by implementing the security SoC on a Cyclone-5 FPGA device. The security SoC, synthesized with a 65-nm CMOS cell library, occupies 193,312 gate equivalents (GEs) and 84 kbytes of RAM.