• Journal of IKEEE
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• v.22 no.3
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• pp.522-531
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• 2018

A public-key cryptography processor EC-RSA was designed, which integrates a 224-bit prime field elliptic curve cryptography (ECC) defined in the FIPS 186-2 as well as RSA with 2048-bit key length into a single hardware structure. A finite field arithmetic core used in both scalar multiplication for ECC and exponentiation for RSA was designed with 32-bit data-path. A lightweight implementation was achieved by an efficient hardware sharing of the finite field arithmetic core and internal memory for ECC and RSA operations. The EC-RSA processor was verified by FPGA implementation. It occupied 11,779 gate equivalents (GEs) and 14 kbit RAM synthesized with a 180-nm CMOS cell library and the estimated maximum clock frequency was 133 MHz. It takes 867,746 clock cycles for ECC scalar multiplication resulting in the estimated throughput of 34.3 kbps, and takes 26,149,013 clock cycles for RSA decryption resulting in the estimated throughput of 10.4 kbps.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.10 no.1
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• pp.77-87
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• 2000

타원곡선 이산대수 문제에 기초한 공개키 암호시스템에서 타원곡선 멱승은 반드시 필요한 연산이며 연산들 중에서 가장 복잡도가 크다. 따라서 효율적인 암호시스템 구현을 위해서는 타원곡선 멱승연산을 효율적으로 구현하는 것이 중요하다. 본 논문에서는 복합 좌표계(mixed coordinate system)를 이용한 멱승 방법을 GF(pm)상에서 정의되는 타원 곡선을 적용하여 최적의 효율성을 갖는 타원곡선 멱승 구현법을 제안한다. 또한 ‘곱셈을 이용한 역원 연산 알고리즘(IM; Inversion with Multiplication)’을 이용하여 더욱 효율적인 구현이 가능함을 보인다.