• 제목/요약/키워드: Dynamic amplifier

검색결과 192건 처리시간 0.024초

광대역 고감도 DLVA 개발

  • 이두훈;김상진;김재연;조현룡;이정문;김상기
    • 한국전자파학회지:전자파기술
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    • 제11권4호
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    • pp.39-52
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    • 2000
  • A design of 2 stage S-DLVA(successive detector log video amplifier) was studied to detect wide dynamic radar pulse ranging from -70 ㏈m to 0㏈m. A basic design idea was focused on the linear detection in logarithmic scale of wide dynamic range radar pulses from nosie-like weak power of -70 ㏈m to relatively high power 0 ㏈m. It is highly formidable, since it requires high speed detection less than 10 nsec over the operating frequency ranges from 6 to 18 ㎓. A limiter diode, a tunnel diode and an L17-C were used as a protecting device, a detector diode and a log video amplifier in companion as a single stage detector to give voltage output proportional to the input power of about 35 ㏈ dynamic range. A protype of 2-stage DLVA having one more single stage detector was fabricated with a 32 ㏈ low noise amplifier and a 3 ㏈ hybrid coupler to provide total 70 ㏈ dynamic range detection. The logging characteristics were measured to have log slope of 25m.V/㏈ against 70 ㏈ logging range from -55 ㏈m to +15 ㏈m, the log linearity of within +/- 1.5 ㏈, and tangential sensitivity was at -63 ㏈m. The pulse dynamics of rise time and recovery time were measured as 50 nsec and 1.2 $\mu$sec, respectively. The reason might be due to the parasitic capacitances of packaged limiter, tunnel diode, and L17-C.

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2.4 GHz WLAN InGaP/GaAs Power Amplifier with Temperature Compensation Technique

  • Yoon, Sang-Woong;Kim, Chang-Woo
    • ETRI Journal
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    • 제31권5호
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    • pp.601-603
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    • 2009
  • This letter presents a high performance 2.4 GHz two-stage power amplifier (PA) operating in the temperature range from $-30^{\circ}C$ to $+85^{\circ}C$ for IEEE 802.11g, wireless local area network application. It is implemented in InGaP/GaAs hetero-junction bipolar transistor technology and has a bias circuit employing a temperature compensation technique for error vector magnitude (EVM) performance. The technique uses a resistor made with a base layer of HBT. The design improves EVM performance in cold temperatures by increasing current. The implemented PA has a dynamic EVM of less than 4%, a gain of over 26 dB, and a current less than 130 mA below the output power of 19 dBm across the temperature range from $-30^{\circ}C$ to $+85^{\circ}C$.

Floating Inverter Amplifiers with Enhanced Voltage Gains Employing Cross-Coupled Body Biasing

  • Jae Hoon Shim
    • 센서학회지
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    • 제33권1호
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    • pp.12-17
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    • 2024
  • Floating inverter amplifiers (FIAs) have recently garnered considerable attention owing to their high energy efficiency and inherent resilience to input common-mode voltages and process-voltage-temperature variations. Since the voltage gain of a simple FIA is low, it is typically cascaded or cascoded to achieve a higher voltage gain. However, cascading poses stability concerns in closed-loop applications, while cascoding limits the output swing. This study introduces a gain-enhanced FIA that features cross-coupled body biasing. Through simulations, it is demonstrated that the proposed FIA designed using a 28-nm complementary metal-oxide-semiconductor technology with a 1-V power supply can achieve a high voltage gain (> 90 dB) suitable for dynamic open-loop applications. The proposed FIA can also be used as a closed-loop amplifier by adjusting the amount of positive feedback due to the cross-coupled body biasing. The capability of achieving a high gain with minimum-length devices makes the proposed FIA a promising candidate for low-power, high-speed sensor interface systems.

디지털 광대역 마이크로 웨이브 수신기에서의 선형 증폭기와 ADC 접 속의 해석 (Analysis of the linear Amplifier/Analog-Digital Converter Interface in a Digital Microwave Wideband Receiver)

  • 이민혁;장은영
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1998년도 하계종합학술대회논문집
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    • pp.110-113
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    • 1998
  • An analysis of the relationship between a linear amplifier chain and an analog-to-digital converter(ADC) in a digital microwave widevand receiver, with respect to sensitivity and dynamic range issues, is presented. The effects of gain, third-order intermodulation products and ADC characteristics on the performance of the receiver are illustrated and design criteria for the linear amplifier chain given a specified ADC are developed. A computer program is used to calculate theretical receiver performance based on gain and third-order intermodulation product selections. Simulated results are also presented and compared with theoretical values.

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CW-HB를 이용하는 전치증폭기를 가진 SOA-MZI 파장변환기에서 IPDR 개선 (Enhancement of IPDR of SOA-MZI Wavelength Converter with Pre-amplifier Using a CW-HB)

  • 김주엽;한상국
    • 한국통신학회논문지
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    • 제31권1A호
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    • pp.11-15
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    • 2006
  • CW-HB(continuous wave-holding beam)를 이용하여 전치 증폭되는 SOA-MZI(semiconductor optical amplifier-Mach-Zehnder interferometer) 파장변환기가 제안되고 10Gb/s에서 실험적으로 검증되었다. 바이어스 전류만으로 전치증폭기를 제어하던 기존의 방법과 비교할 때, 제안된 CW-HB 제어 방법은 IPDR(input power dynamic range)의 개선 측면에서는 20dB 정도로 유사하나 출력신호의 왜곡을 제거하여 Q 파라미터를 $2{\sim}3$ 정도 향상시키고 낮은 NF(noise figure)를 달성하여 $2{\sim}5dB$ 정도 더 높은 소광 비를 얻을 수 있어서 매우 우수하다.

넓은 동작영역과 고속특성을 갖는 로그 증폭기의 설계 (Design of a wide dynamic range and high-speed logarithmic amplifier)

  • 박기원;송민규
    • 대한전자공학회논문지SD
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    • 제39권7호
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    • pp.97-103
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    • 2002
  • 본 논문은 레이더 시스템이나 위성 통신용으로 사용되어지는 LVA(Logarithmic Video Amplifier) 설계에 관한 내용이다. 제안된 LVA는 입력단, 증폭단, 그리고 출력단으로 나뉘어진다. 넓은 동작 영역과 고속특성을 갖도록 새로운 직 ${\cdot}$ 병렬 구조를 제안하였으며 LVA와 전단인 Detector Diode와의 입력 범위 조절을 위하여 새로운 입력단을 설계하였다. 제안된 LVA는 1.5 um, 2-poly, 2-Metal, n-well, BiCMOS, 공정을 사용하였으며, 유효 칩 면적은 1310 um x 1540 um 고 10V 전압에서 190 mW 의 전력 소모를 나타내었다. 모의 실험 및 측정을 통하여 60 dB의 동작영역과 100 ns의 falling time을 나타내었다.

A SiGe HBT Variable Gain Driver Amplifier for 5-GHz Applications

  • 채규성;김창우
    • 한국통신학회논문지
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    • 제31권3A호
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    • pp.356-359
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    • 2006
  • A monolithic SiGe HBT variable gain driver amplifier(VGDA) with high dB-linear gain control and high linearity has been developed as a driver amplifier with ground-shielded microstrip lines for 5-GHz transmitters. The VGDA consists of three blocks such as the cascode gain-control stage, fixed-gain output stage, and voltage control block. The circuit elements were optimized by using the Agilent Technologies' ADSs. The VGDA was implemented in STMicroelectronics' 0.35${\mu}m$ Si-BiCMOS process. The VGDA exhibits a dynamic gain control range of 34 dB with the control voltage range from 0 to 2.3 V in 5.15-5.35 GHz band. At 5.15 GHz, maximum gain and attenuation are 10.5 dB and -23.6 dB, respectively. The amplifier also produces a 1-dB gain-compression output power of -3 dBm and output third-order intercept point of 7.5 dBm. Input/output voltage standing wave ratios of the VGDA keep low and constant despite change in the gain-control voltage.

A CMOS Envelope Tracking Power Amplifier for LTE Mobile Applications

  • Ham, Junghyun;Jung, Haeryun;Kim, Hyungchul;Lim, Wonseob;Heo, Deukhyoun;Yang, Youngoo
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권2호
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    • pp.235-245
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    • 2014
  • This paper presents an envelope tracking power amplifier using a standard CMOS process for the 3GPP long-term evolution transmitters. An efficiency of the CMOS power amplifier for the modulated signals can be improved using a highly efficient and wideband CMOS bias modulator. The CMOS PA is based on a two-stage differential common-source structure for high gain and large voltage swing. The bias modulator is based on a hybrid buck converter which consists of a linear stage and a switching stage. The dynamic load condition according to the envelope signal level is taken into account for the bias modulator design. By applying the bias modulator to the power amplifier, an overall efficiency of 41.7 % was achieved at an output power of 24 dBm using the 16-QAM uplink LTE signal. It is 5.3 % points higher than that of the power amplifier alone at the same output power and linearity.

An Excessive Current Subtraction Technique to Improve Dynamic Range for Touch Screen Panel Applications

  • Heo, Sanghyun;Ma, Hyunggun;Bien, Franklin
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제16권3호
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    • pp.375-379
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    • 2016
  • A current subtraction technique with parallel operation system is proposed to remove excessive current in touch screen application. The proposed current subtraction remove the current which go into the input node of charge amplifier. The value of subtraction current is same with current when touch screen is not touched. As a result, charge amplifier output is only proportional to variation of mutual capacitor, which make dynamic rage is increased. Also, Transmitter (Tx) driving signal and subtraction driving signal are out of phase each other. Thus, noise generated in Tx is cancelled. The proposed IC is implemented in a mixed-mode 0.18-um CMOS process. Overall system is designed for touch screen panel (TSP) with 16 driving lines and 8 sensing lines. 5-V supply voltages are used in the proposed circuits. For multiple Tx driving signal, Walsh codes are used and signal frequency is 300 khz. By using proposed technique, dynamic rage is improved 36 dB.

Design of Low Power All-Optical Networks with Dynamic Lightpath Establishment

  • Hirata, Kouji;Ito, Kohei;Fukuchi, Yutaka;Muraguchi, Masahiro
    • Journal of Communications and Networks
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    • 제18권4호
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    • pp.551-558
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    • 2016
  • In multifiber all-optical networks, optical amplifiers are used for amplifying multiple optical signals with different wavelengths in fibers. An optical amplifier operates when any of lightpaths passes through it. Therefore, it should simultaneously amplify as many lightpaths as possible for efficiently utilizing its power. This paper proposes a dynamic lightpath establishment scheme considering the use efficiency of the optical amplifiers and the depletion of the wavelength resources in multifiber all-optical networks. The proposed scheme provides a routing and wavelength assignment strategy that reduces both the power consumption of the optical amplifiers and the blocking probability of the lightpath establishment. Through simulation experiments, we demonstrate the effectiveness of the proposed scheme.