• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.12A
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• pp.1985-1991
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• 1999

In this paper, complete and general two-port lumped Spice-network model is developed for a lossy transmission line. This model is realized as a Spice subcircuit, by means of standard lumped network elements and mathematical functions. It is used as a component in the time-domain simulation of a high-speed data transmission line such as IMI(Inter Module Interface) data path in HANbit ACE 64 ATM switching system. The only required Spice network elements are resistance and frequency-dependent controlled-voltage sources. Such frequency-dependent sources are realized by utilizing the standard Hspice mathematical functions FREQ, DELAY, and POLY.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.11
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• pp.1121-1126
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• 2003

In this paper we show impulse generator which is important component in UWB communication. There is two steps to generate monocycle impulse. In first step, Gaussian pulse was made by operation of transistor switching and operation time of transistor switching. The second step the high pass filter change from Gaussian to Monocycle impulse. The result of this impulse generator is impulse whose pulse width is 0,9 ns in time domain and amplitude is +/-250 ㎷.

• Proceedings of the KIPE Conference
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• 2001.07a
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• pp.223-226
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• 2001

In this paper, dc link ripple currents for three-phase ac/dc/ac PWM converters are analyzed in a frequency domain. The expression of the harmonic currents is developed by using switching functions and exponential Fourier series expansion. The dc link ripple currents with regard to power factor and modulation index are investigated. In addition, the effect of the displacement angle between the switching periods of line-side converters and load-side inverters on the do link ripple current is studied. The result of the do link current analysis is helpful in specifying the dc link capacitor size and its life time estimation.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1132-1133
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• 2007

A circuit-domain model of PWM inverter provides accurate simulation results in consideration of detail switching characteristics. Although, a huge amount of computation time is demanded for the simulation results of several ten seconds, which is the required time to analyze system behaviors or control performances of Electric Power Steering(EPS) on real drive condition. This paper describes the nonlinear inverter model for fast dynamic simulation of EPS without the PWM concept through analyzing the effect of nonlinear switching characteristics like dead time, forward voltage drop and conduction resistance. Some inverter models including proposed model are compared from two standpoints which are computation time and accuracy. The comparison results show the usefulness of the developed model in order to develop the control algorithm through the fast prediction of system behaviors.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.479-480
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• 2007

This paper reports the results of time-domain simulation for the KEPCO metropolitan system with a secondary voltage regulation (SVR) model, developed with TSAT user defined model blocks. The previously proposed model in the literature needs switching blocks for converting level signals generated by a regional voltage regulator (RVR) into settings of reactive generation. This paper modified the SVR model not to incorporate the switching blocks, so it is much easier to implement the modified model on the simulation tool.

• Journal of Power Electronics
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• v.19 no.6
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• pp.1449-1457
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• 2019

This paper presents two voltage domain stacking topologies for powering integrated digital loads such as multiprocessors or 3D integrated circuits. Pairs of loads and capacitors are connected in series to form a stack of voltage domains. The voltage is balanced by switching the position of the capacitors in one case and the position of the loads in the other case. This method makes the voltage regulation robust to large differential load power consumption. The first configuration can be named the load stacking topology. The second configuration can be named the capacitor stacking topology. This paper aims at proposing and comparing these two topologies. Models of both topologies and a switching scheme are presented. The behavior, control scheme, losses and overall performance are analyzed and compared theoretically in simulation and experiments. Experimental results show that the capacitor stacking topology has better performance with a 30% voltage ripple reduction.

• Journal of the Optical Society of Korea
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• v.18 no.6
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• pp.783-787
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• 2014

This paper presents an improved vertical alignment nematic liquid crystal mode characterized by the protrusions or slits of the top substrate and additional stripe type common electrodes with polarity switching of the bottom substrate to improve multi-domain vertically aligned (MVA) and patterned vertically aligned (PVA) nematic modes. MVA and PVA modes have disadvantages such as an LC disclination in the vicinity of the middle region of electrodes between the top and bottom protrusions in MVA mode or the top and bottom slits in PVA mode. Therefore, the stripe type common electrode generating a horizontal electric field and the protrusion or slit producing some pretilt of liquid crystals (LCs) were used to improve the LC disclination, which influences the transmittance and response speed. The simulation results showed that the proposed VA mode has higher transmittance than the MVA and PVA modes. As a result, the proposed VA mode can improve the response speed and transmittance remarkably, which makes it useful for upgrading the LCD display quality.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.581-584
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• 2003

Most modeling about dynamic behavior of Antiferroelectric Liquid Crystal (AFLC) is limited to the hysteric characteristics of AFLC cells or thresholdless switching of frustrated AFLC cells. In this paper, domain growth of AFLC cells is modeled with extended bilayer model. When driving pulses that consist of a selection voltage, a bias voltage, and a reset voltage are applied to the AFLC cell, its dynamic behavior is simulated.

• ETRI Journal
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• v.39 no.3
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• pp.310-318
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• 2017

Unified speech and audio coding (USAC) is one of the latest coding technologies. It is based on a switchable coding structure, and has demonstrated the highest levels of performance for both speech and music contents. In this paper, we propose an extended version of USAC with a single-mode of operation-which does not require a switching system-by extending the linear prediction-coding mode. The main concept of this extension is the adoption of the advantages of frequency-domain coding schemes, such as windowing and transition control. Subjective test results indicate that the proposed scheme covers speech, music, and mixed streams with adequate levels of performance. The obtained quality levels are comparable with those of USAC.

• Proceedings of the Korean Society of Marine Engineers Conference
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• 2002.05a
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• pp.219-223
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• 2002

Voltage and current signals during impulse tests on transformer are treated as non-stationary signals. A new method incorporating signal-processing method such as Wavelets and courier transform is proposed for failure identification. It is now possible to distinguish failure during impulse tests. The method is experimentally validated on a transformer winding. The wavelet transforms enables the detection of the time of occurrence of switching or failure events. After establishing the time of occurrence, the original waveform is split into two or more sections. The wavelet transform has ability to analysis the failure signal on time domain as well as frequency domain. Therefore, the wavelet transform is superior than courier transform to analysis the failure signal. In this paper, the fact was proved by real data which was achieved.