• Proceedings of the Korea Multimedia Society Conference
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• 2012.05a
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• pp.340-342
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• 2012

Integral Imaging (II) is an attractive technique for three-dimensional (3D) image, video display and recording. Inherently, the high resolution II requires an enormous amount of data for storing and transmitting of 3D scenes. Compression techniques attempt to evade this issue. In this study, we made a comparative performance analysis of popular transforming/compression techniques such as the Discrete Cosine Transform (DCT) and the Discrete Wavelet Transform (DWT) in order to compress 3D-II. The standard baseline JPEG (Joint Photographic Experts Group) using DCT and JPEG 2000 using DWT methods were manipulated in our experiments. In our analysis, we have shown that the DWT based JPEG 2000 compression methodology could be a good alternative for 3D-II.

• IEIE Transactions on Smart Processing and Computing
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• v.3 no.3
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• pp.103-109
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• 2014

This study derived the inter-conversion matrices, which can be used in heterogeneous image transcoding between the compressed images using different transforms, such as the $8{\times}8$ block discrete cosine transform (BDCT) and the one-level discrete wavelet transform (DWT). Basically, to obtain the one-level DWT coefficients from $8{\times}8$ BDCT, inverse BDCT should be performed followed by forward DWT, and vice versa. On the other hand, if the proposed interconversion approach is used, only one inter-conversion matrix multiplication makes the corresponding transcoding possible. Both theoretical and experimental analyses showed that the amount of computation of the proposed approach decreases over 20% when the inter-conversion matrices are used under specific conditions.

• Journal of Broadcast Engineering
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• v.21 no.2
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• pp.149-156
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• 2016

We proposed a blind watermarking scheme using singular vectors based on Discrete Wavelet Transform (DWT) and Redundant Discrete Wavelet Transform (RDWT) combined with Singular Value Decomposition (SVD) for copyright protection application. We replaced the 1st left and right singular vectors decomposed from cover image with the corresponding ones from watermark image to overcome the false-positive problem in current watermark systems using SVD. The proposed scheme realized the watermarking system without a false positive problem, and shows high fidelity and robustness.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.15 no.2
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• pp.113-122
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• 2005

In this paper, we propose a multi-watermarking algorithm to satisfy two purposes: fragility against malicious attacks and robustness against non-malicious attacks. The algorithm can be used for image authentication using coefficients of Discrete Wavelet Transform(DWT). In the proposed method, watermarks are generated by combining binary image with some features extracted from the subband LL3, and then they are embedded into both the spatial and frequency domain. That is, on the spatial domain they are embedded into the Least Significant Bit(LSB) of all pixels of image blocks, and on the frequency domain the coefficients of the subband LH2 and HL2 are adjusted according to the watermarks. Thus the algorithm not only resists malicious attack but also permits non-malicious attacks such as blurring, sharpening, and JPEG compression.

• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.2
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• pp.100-105
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• 2022

This paper applies the arc detection algorithm to prevent the false detection in photo voltaic series arc detection circuit, which is required not only to detect the series arc quickly, but also not falsely detect the arc for the non-arc noise. For this purpose, this study proposes a rapid and preventive false detection method of single peak noise and short noise signals. First, to prevent false detection by single peak noise, Discrete wavelet transform (DWT)-based characteristic parameters are applied to determine the shape and the amplitude of the noise. In addition, arc fault detection within a few milliseconds is performed with the DWT iterative algorithm to quickly prevent false detection for short noise signals, considering the continuity of serial arc noise. Thus, the method operates not only to detect series arc, but also to avoid false arc detection for peak and short noises. The proposed algorithm is applied to real-time serial arc detection circuit based on the TMS320F28335 DSP. The serial arc detection and peak noise filtering performances are verified in the built simulated arc test facility. Furthermore, the filtering performance of short noise generated through DC switch operation is confirmed.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.40 no.5
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• pp.332-346
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• 2003

In this paper, a system which can compress and reconstruct the digital image was implemented using 2 dimensional DWT(Discrete Wavelet Transform). The proposed system consists of the FPGA board tocompress the image and the application software(S/W) to reconstruct it. First the FPGA receives the image from AID converter and compresses the image using wavelet transform. The compressed data is transferred into the PC using the PCI interface. The compressed image is reconstructed by an application S/W inside the PC. The image compressor can compress about 60 fields per second, in which the image format was NTSC YCbCr(4:2:2) and the image size was 640${\times}$240 pixels per field. The designed hardware mapped into one FPGA occupying 11,120 LAB (Logic Array Block) and 27,456 ESB(Embedded System Block) in APEX20KC EP20K1000B652-7. It globally uses 33MHz clock and the memory control part uses 100MHz.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.665-666
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• 2006

By adding user interface to the usual router, an improved functional router is implemented In this paper, we design the DWT(Discrete Wavelet Transform) for JPEG2000 CODEC. The DWT is developed based on ARM-based Excalibur, and the system contains DMA processor, Slave interface, DWT filter, Controller. The architecture of the prposed DWT is verified using Altera QuartusII.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.1
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• pp.157-165
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• 2013

In this paper, efficient digit-serial VLSI architecture for 1D (9,7) lifting-based discrete wavelet transform (DWT) filter has been proposed. The proposed architecture computes the DWT in digit basis, so that the required hardware is reduced. Also, the multiplication is replaced with the shift and add operation to minimize the hardware requirement. Bit allocation for input, output, and the internal data has been determined by analyzing the PSNR. We have carefully designed the data feedback latency not to degrade the performance in the recursive folded scheduling. The proposed digit-serial architecture requires small amount of hardware but achieve 100% of hardware utilization, so we try to optimize the tradeoffs between the hardware cost and the performance. The proposed architecture has been designed and verified by VerilogHDL and synthesized by Synopsys Design Compiler with a DongbuHitek $0.18{\mu}m$ STD cell library. The maximum operating frequency is 330MHz with 3,770 gates in equivalent two input NAND gates.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.36S no.6
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• pp.96-103
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• 1999

This paper proposes efficient VLSI architecture for computation of the 1-D discrete wavelet transform (DWT). The proposed VLSI architecture computes the wavelet lowpass and highpass output sequences using the product term anhm, $n,m{\ge}0$, where an and hm denote the imput sequence and the wavelet lowpass filter coefficient, respectively. Whereas the conventional architectures compute the lowpass and highpass output sequences using the product terms anhm and angm, respectively, where gm denotes the wavelet highpass filter coefficient. The proposed architecture is applied to computation of the Daubechies 4-tap wavelet transform using the relationships between the Daubechies wavelet filter coefficients. Performance comparison of various architectures for computation of the 1-D DWT are presented. Note that the proposed architecture does not require extra processing units whereas the conventional architectures need them. Also it is modeled in very high speed integrated circuit hardware description language (VHDL) and simulated to show its functional validity.

• Journal of the Institute of Convergence Signal Processing
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• v.20 no.2
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• pp.78-83
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• 2019

Sounds based machine fault diagnosis recovers all the studies that aim to detect automatically abnormal sound on machines using the acoustic emission by these machines. Conventional methods that use mathematical models have been found inaccurate because of the complexity of the industry machinery systems and the obvious existence of nonlinear factors such as noises. Therefore, any fault diagnosis issue can be treated as a pattern recognition problem. We propose here an automatic fault diagnosis method of hand drills using discrete wavelet transform(DWT) and pattern recognition techniques such as artificial neural networks(ANN). We first conduct a filtering analysis based on DWT. The power spectral density(PSD) is performed on the wavelet subband except for the highest and lowest low frequency subband. The PSD of the wavelet coefficients are extracted as our features for classifier based on ANN the pattern recognition part. The results show that the proposed method can be effectively used not only to detect defects but also to various automatic diagnosis system based on sound.