• Journal of the Institute of Convergence Signal Processing
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• v.19 no.4
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• pp.186-191
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• 2018

As influence of the 4th industry is growing with development of information society more electronic devices and sensor are used in the field. As this is the case, importance of signal processing during data transfer is rising Furthermore, the need for technology to remove noise caused by various reasons and to stabilize sensor output is growing as well. This research suggests digital filter algorithm that efficiently remove noise by stabilizing output of accelerating sensor. The standard value of this algorithm is calculated by applying Gaussian coefficient. To maintain its feature, final output is obtained by subtracting weight depending on variance from standard value For its evaluation, it is compared with other protocols and its function is checked through output features.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.12 s.354
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• pp.9-15
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• 2006

In this paper, signal processing techniques for noncoherent impulse-radio-based UWB (IR-UWB) communication system are proposed to provide system implementation of low power consumption and low complexity. The proposed system adopts a simple modulation technique of OOK (on-oft-keying) and noncoherent signal detection based on signal amplitude. In particular, a technique of a novel high speed digital sampler using a stable, lower reference clock is developed to detect nano-second pulses and recover digital signals from the pulses. Also, a 32 bits Turyn code for data frame synchronization and a convolution code as FEC are applied, respectively. To verify the proposed signal processing techniques for low power, low complexity noncoherent IR-UWB system, the proposed signal processing technique is implemented in FPGA and then a short-range communication system for wireless transmission of high quality MP3 data is designed and tested.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2001.06a
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• pp.89-92
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• 2001

In this paper, as a study of programmable software radio digital communication, we implemented ASK(Amplitude Shift Keying), FSK(Frequency Shift Keying), and PSK(Phase Shift Keying) modulation using programmable software(algorithm) of DSP(Digital Signal Processor). Moreover, it is possible to select one of those three modulation methods by realizing on single DSP. We adopted Motorola DSP56002 and Crystal CS4215(A/D and D/A converter) for our purpose. The DSP56002 is 24-bit and operates 20 MIPS at 40 MHz, and the CS4215 is 16-bit and supports the maximum 50 kHz sampling frequency.

• Journal of Biomedical Engineering Research
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• v.6 no.2
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• pp.13-14
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• 1985

We have developed a microprogramir!able signal processor for real-time ultrasonic signal processing. Processing speed was increased by the parallelism in horizontal microprogram using 104bits microcode and the Pipelined architecture. Control unit of the signal processor was designed by microprogrammed architec- ture and writable control store (WCS) which was interfaced with host computer, APPLE- ll . This enables the processor to develop and simulate various digital signal processing algorithms. The performance of the processor was evaluated by the Fast Fourier Transform (FFT) program. The execution time to perform 16 bit 1024 points complex FF7, radix-2 DIT algorithm, was about 175 msec with IMHz master Clock. We can use this processor to Bevelop more efficient signal processing algorithms on the biological signal processing.

• Proceedings of the KSR Conference
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• 2000.11a
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• pp.733-739
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• 2000

This paper is described the development of on-line partial discharge detector for high voltage apparatus. This detector consists of acoustic and high frequency current sensors, amplifier part, A/D converter part, data communication part and computer. The contents of paper are characteristics of units and digital signal processing for reducing noise in partial discharge detection. We seek methods to do good digital signal processing for detection of partial discharge. We apply digital filtering methods to the elect Tic signal and a cross con-elation to the acoustic signal. This paper shows the characteristics of these filtering method and cross con-elation in partial discharge detection.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 1995.06a
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• pp.165-170
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• 1995

In this paper, it is attempted to apply the adaptive digital signal processing to compensate for a linear distortion of a loudspeaker and implement a real time hardware for that purpose. The real time system is implemented by using the DSP56001, a general purpose signal processor, as a host processor and the DSP56200, a cascadable adaptive FIR filter peripheral chip, as an adaptive digital filter. The system has 1000 taps at a 44.1kHz. After inverse modeling of under_compensation_speaker, the system reduces loudspeaker's linear distortions by pre-processing an input audio signal to loudspeaker. The experiment shows satisfactory results; after adaption with white noise as input signal for 60sec, the flat amplitude and linear phase frequency characteristics is found to lie over a wide frequency range of 100Hz to 20kHz.

• Journal of Korea Society of Digital Industry and Information Management
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• v.16 no.1
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• pp.93-98
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• 2020

Research on underwater sensor networks is increasing due to such reasons as marine resource management, maritime disaster prediction and military protection. Many underwater sensor networks performs wireless communication using an acoustic sound wave band signal having a relatively low frequency. So the digital part of their modem can take charge of carrier band signal processing. To enable this, the sampling rate of the baseband band signal should be increased to a sampling rate at which carrier band signal processing is possible. In this paper, we designed a sampling rate increasing circuit based on a CIC interpolator for underwater sensor nodes. The CIC interpolator has a simple circuit structure. However, since the CIC interpolator has a large attenuation of the pass band and a wide transition band, an inverse sinc LPF is added to compensate for frequency response of the CIC interpolator. The proposed interpolator was verified in time domain and frequency domain using ModelSim and Matlab.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.58 no.4
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• pp.623-626
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• 2009

In this paper, we applied new analog viterbi decoder to decode PR(1,2,2,1) signal for DVD and analyze the specific and signal characteristics. We implemented the parallel analog viterbi decoder and the convolution digital viterbi decoder(the digital PRML) utilizing the technology of analog parallel processing circuits. The proposed analog viterbi decoder can replace the conventional digital viterbi decoder by a new one. Our circuits design the low distortion and the high accuracy over the previous implementation. Through the parallel structure of the proposed viterbi decoder, we got the achievement of the decoding speed by the multiple times.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.30B no.12
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• pp.31-39
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• 1993

In the playback signal processing of a digital magnetic recording system, the major signal processing processes consist of pulse equalization. pulse detection, clock recovery, and data recovery. Equalizer which compensates interference occurrde between pulses recorded in high density on a magnetic media is realized by pulse slimming method, and pulse detection by a integrating detector. Clock recovery from the detector output was accomplished by using PLL. and data recovery to reduce noise effects was carried out by utilizing the three sampling clocks recovered in clock recovery process. In this paper these processes are implemented in hardware and its performance is evaluated by experimenting with a commercial DAT. It was found that the playback signal processor proposed is suitable to the practical high density magnetic recording system.

• Information and Communications Magazine
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• v.9 no.9
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• pp.72-85
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• 1992

The throughput requirement for many digital signal processing is such that multiple processing units are essential for real-time implementation. Advances in VLSI technology make it feasible to design and implement computer systems consisting of a large number of function units. The research on a very high throughput VLSI architecture for digital signal processing applications requires the development of an algorithm, decomposition scheme which can minimize data communication requirements as well as minimize computational complexity. The objectives of the research are to investigate computationally efficient algorithms for solution of the class of problems which can be modeled as DLSI systems or adaptive system, and develop VLSI architectures and associated multiprocessor systems which can be used to implement these algorithms in real-time. A new VLSI architecture for real-time 2-D digital signal processing applications is proposed in this research. This VLSI architecture extends the concept of having a single processing units in a chip. Because this VLSI architecture has the advantage that the complexity and the number of computations per input does not increase as the size of the input data in increased, it can process very large 2-D date in near real-time.