• 제목/요약/키워드: Delay effects

검색결과 1,069건 처리시간 0.028초

Analysis of Effects of Time-Delay in an Inverted Pendulum System Using the Controller Area Network

  • Cho, Sung-Min;Hong, Suk-Kyo
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2004년도 ICCAS
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    • pp.1474-1479
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    • 2004
  • In this paper, the design of the network system using the CAN and the analysis of effects of time delay in the system are presented. A conventional implementation technique induces many problems because of the amount and complexity of wiring and maintenance problems. The network system reduces these problems, but it cause another problem; time delay. Time delay in a sampling time does not have much effects on the system, but time delay over the sampling time changes the control frequency and ended up makes the system unstable. It is verified that time delay between each parts has different effects on the entire system. The results from this paper will be a base for studying algorithms to reduce effects of time delay in the system using the CAN.

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Delay of Gratification in Infancy : Effects of Infants' Temperament and Parenting

  • Rha Jong-Hay
    • International Journal of Human Ecology
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    • 제1권1호
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    • pp.59-77
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    • 2000
  • The purpose of this study was to extend our understanding of the developmental antecedents of delay of gratification in infancy. The first goal was to examine direct effects of one feature of an infants’ temperament and of positive and negative parenting assumed at age one on children’s delay of gratification six months later. The second goal of the study was to test the interactive effect of early infant temperament and parenting on children’s delay of gratification. It was hypothesized that 1) less negative infants at 12 months would delay gratification longer six months later, 2) children of parents who provided more positive and sensitive feedback would delay gratification longer than children with parents who were more negative and less sensitive, and 3) there would be differential prediction of parenting for children who scored high and low in negative emotionality as infants. Toward this end, 81 infants were observed interacting at one year of age with their mothers and fathers during laboratory assessments to obtain measures of parenting and infant negative emotionality. At 18 months of age, the child’s capacity to delay touching attractive objects was measured. The main effects of infant negative emotionality and of mothering on children’s delay of gratification were not detected at standard levels of significance. Differential effects of parenting on children’s delay of gratification for infants with low or high negative emotionality, too, were not detected. However, the anticipated effect of fathering on delay of gratification was found in some analyses, indicating that the more positive fathering children received, the longer they could delay gratification in the laboratory six months later.

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A COMPARATIVE STUDY OF CAUSES AND EFFECTS OF PROJECT DELAYS AND DISRUPTIONS IN CONSTRUCTION PROJECTS IN THE SOUTH AFRICAN CONSTRUCTION INDUSTRY

  • Oshungade, Oluwaseun O.;Kruger, Deon
    • Journal of Construction Engineering and Project Management
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    • 제7권1호
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    • pp.13-25
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    • 2017
  • Construction projects have been observed to have problems of project delays and disruptions and the South African construction industry is not an exception. This research identified causes and effects of project delay and disruption through a desktop study. Subsequently, a questionnaire was designed and used to conduct a survey to obtain the views of the three main construction project participants - clients, consultants, and contractors. The questionnaire contains 48 causes and 13 effects of project delay and disruption identified from the desktop study. This research identified sixteen most important causes of project delay and disruption and five most important effects of delay and disruption. Sixteen most important causes were: (1) strikes, (2) rework due to errors during construction, (3) shortage of materials in market, (4) suspension of work by the client, (5) poor communication between the parties, (6) ineffective planning and scheduling of project, (7) delays in issuing working drawings, (8) mistakes and discrepancies in design documents, (9) shortage of labours and equipment, (10) delay in decision making process by the client, (11) unforeseen ground conditions, (12) unclear and inadequate details in drawing, (13) inadequate contractor's experience, (14) delay in approving changes in the scope of works, (15) delay in material delivery and (16) unacceptable quality of materials. The five major effects include: (1) create stress on contractors, (2) cost overrun, (3) time overrun, (4) poor quality of work due to rush, and (5) disputes. Furthermore, the result of this research was compared with the result of previous studies conducted in other regions of Africa in terms of causes and effects of project delay and disruption. The research concludes that numerous causes and effects of delay and disruption are limited to South African construction projects based on the comparison. The causes limited to South African construction projects include: (1) strikes, (2) suspension of work by the client (3) mistakes and discrepancies in design documents (4) delay in approving changes in the scope of works and (5) unacceptable quality of materials, while the two major effects limited to South African construction projects includes: (1) create stress on contractors and (2) poor quality of work. In conclusion, some recommendations were made in order to minimise the causes of delay and disruption identified.

Duty Ratio Predictive Control Scheme for Digital Control of DC-DC Switching Converters

  • Sun, Pengju;Zhou, Luowei
    • Journal of Power Electronics
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    • 제11권2호
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    • pp.156-162
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    • 2011
  • The control loop time delay caused by sampling, the zero-order-holder effect and calculations is inevitable in the digital control of dc-dc switching converters. The time delay will limit the bandwidth of the control loop and therefore degrade the transient performance of digital systems. In this paper, the quantization time delay effects with different time delay values based on a generic second-order system are analyzed. The conclusion that the bandwidth of digital control is reduced by about 20% with a one cycle delay and by 50% with two cycles of delay in comparison with no time delay is obtained. To compensate the time delay and to increase the control loop bandwidth, a duty ratio predictive control scheme based on linear extrapolation is proposed. The compensation effect and a comparison of the load variation transient response characteristics with analogy control, conventional digital control and duty ratio predictive control with different time delay values are performed on a point-of-load Buck converter by simulations and experiments. It is shown that, using the proposed technique, the control loop bandwidth can be increased by 50% for a one cycle delay and 48.2% for two cycles of delay when compared to conventional digital control. Simulations and experimental results prove the validity of the conclusion of the quantization effects of the time delay and the proposed control scheme.

Time-Delay Effects on DC Characteristics of Peak Current Controlled Power LED Drivers

  • Jung, Young-Seok;Kim, Marn-Go
    • Journal of Power Electronics
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    • 제12권5호
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    • pp.715-722
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    • 2012
  • New discrete time domain models for the peak current controlled (PCC) power LED drivers in continuous conduction mode include for the first time the effects of the time delay in the pulse-width-modulator. Realistic amounts of time delay are found to have significant effects on the average output LED current and on the critical inductor value at the boundary between the two conduction modes. Especially, the time delay can provide an accurate LED current for the PCC buck converter with a wide input voltage. The models can also predict the critical inductor value at the mode boundary as functions of the input voltage and the time delay. The overshoot of the peak inductor current due to the time delay results in the increase of the average output current and the reduction of the critical inductor value at the mode boundary in all converters. Experimental results are presented for the PCC buck LED driver with constant-frequency controller.

최소 지연시간을 갖는 CMOS buffer 회로의 설계 기법 (the Design Methodology of Minimum-delay CMOS Buffer Circuits)

  • 강인엽;송민규;이병호;김원찬
    • 대한전자공학회논문지
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    • 제25권5호
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    • pp.509-521
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    • 1988
  • In the designs of integrated circuits, the buffer circuits used for driving a large capacitive load from minimum-structured logic circuit outputs have important effects upon system throughputs. Therefore it is important to optimize the buffer circuits. In this paper, the principle of designing CMOS buffer circuits which have the minimum delay and drive the given capacitive load is discussed. That is, the effects of load capacitance upon rise time, fall time, and delay of the CMOS inverter and the effects of parasitic capacitances are finely analysed to calculate the requested minimum-delay CMOS buffer condition. This is different from the method by C.A. Mead et. al.[2.3.4.]which deals with passive-load-nMOS buffers. Large channel width MOS transistor stages are necessary to drive a large capacitive load. The effects of polysilicon gate resistances of such large stages upon delay are also analysed.And, the area of buffer circuits designed by the proposed method is smaller than that of buffer circuits designed by C.A. Mead's method.

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시간지연에 의한 일차홀드 방식을 포함하는 가상벽 모델의 안정성 영향 분석 (Effects of the time delay on the stability of a virtual wall model with a first-order-hold method)

  • 이경노
    • 융복합기술연구소 논문집
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    • 제4권2호
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    • pp.17-21
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    • 2014
  • This paper presents the effects of the time delay on the stability of the haptic system that includes a virtual wall and a first-order-hold method. The model of a haptic system includes a haptic device model with a mass and a damper, a virtual wall model, a first-order-hold model and a time delay model. In this paper, the time delay is considered as the computational time delay that is assumed to be as much as the sampling time. As the time delay increases, the maximal available stiffness of a virtual wall model is reduced reversely. The relation among the time delay and the maximum available stiffness, the mass and the damper of the haptic device are analyzed using the MATLAB simulation.

3단 덕트 시스템에서 화염전달함수가 연소불안정 모델링 결과에 미치는 영향 (Effects of Flame Transfer Function on Modeling Results of Combustion Instabilities in a 3 Step Duct System)

  • 홍수민;김대식
    • 한국분무공학회지
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    • 제25권3호
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    • pp.119-125
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    • 2020
  • In this paper, we used Helmholtz solver based on 3D finite element method to quantitatively analyze the effects of change of gain, time delay and time delay spread, which are the main variables of flame transfer function, on combustion instability in gas turbine combustor. The effects of the variable of flame transfer function on the frequency and growth rate, which are the main results of combustion instability, were analyzed by applying the conventional heat release fluctuation model and modified one considering the time spread. The analysis results showed that the change of gain and time delay in the same resonance mode affected the frequency of the given resonance modes as well as growth rate of the feedback instability, however, the effect of time delay spread was not relatively remarkable, compared with the dominant effect of time delay.

Time-Delay Effects on DC Characteristics of Peak Current Controlled Power LED Drivers

  • Kim, Marn-Go;Jung, Young-Seok
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2011년도 전력전자학술대회
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    • pp.481-482
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    • 2011
  • New discrete time domain models for the peak current controlled (PCC) power LED drivers in continuous conduction mode include for the first time the effects of time delay in the pulse-width-modulator. Realistic amounts of time delay are found to have significant effects on the average output LED current and on the critical inductor value at the boundary between two conduction modes. Especially, the time delay can provide an accurate LED current for the PCC buck converter with a wide input voltage. The models can also predict the critical inductor values at the mode boundary as functions of the input voltage and the time delay.

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신호교차로 분석시 초기대기행렬이 총지체도에 미치는 영향에 관한 연구 (The Study on Effects Caused by the Initial Queue to the Total Delay Estimation in Analyzing Signalized Intersection)

  • 박순표;김기혁
    • 대한토목학회논문집
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    • 제29권5D호
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    • pp.563-570
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    • 2009
  • 본 연구는 신호교차로 분석시 추가지체 산정을 위하여 적용하는 초기 대기차량이 총 지체도에 얼마나 영향을 미치는지 분석하기 위한 목적으로 실시하였다. 평균교차로 지체시간을 측정하기위하여 통과차량과 대기행렬이 측정되었다. 분석결과, 시험차량의 평균 지체도가 60초/대 미만 일 경우에는 세가지 지체도 산정방법이 모두 유사한 것으로 분석되었으나, 60~70초/대는 초기 대기차량을 적용한 지체도만 시험차량의 평균지체도와 유사한 것으로 분석되었다.